| Message ID | 1539257761-23023-1-git-send-email-tdas@codeaurora.org |
|---|---|
| Headers | show |
| Series | cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver | expand |
Quoting Taniya Das (2018-10-11 04:36:01) > --- a/drivers/cpufreq/Kconfig.arm > +++ b/drivers/cpufreq/Kconfig.arm > @@ -121,6 +121,17 @@ config ARM_QCOM_CPUFREQ_KRYO > > If in doubt, say N. > > +config ARM_QCOM_CPUFREQ_HW > + bool "QCOM CPUFreq HW driver" Is there any reason this can't be a module? > + depends on ARCH_QCOM || COMPILE_TEST > + help > + Support for the CPUFreq HW driver. > + Some QCOM chipsets have a HW engine to offload the steps > + necessary for changing the frequency of the CPUs. Firmware loaded > + in this engine exposes a programming interface to the OS. > + The driver implements the cpufreq interface for this HW engine. > + Say Y if you want to support CPUFreq HW. > + > config ARM_S3C_CPUFREQ > bool > help > diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c > new file mode 100644 > index 0000000..fe1c264 > --- /dev/null > +++ b/drivers/cpufreq/qcom-cpufreq-hw.c > @@ -0,0 +1,354 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* > + * Copyright (c) 2018, The Linux Foundation. All rights reserved. > + */ > + > +#include <linux/cpufreq.h> > +#include <linux/init.h> > +#include <linux/kernel.h> > +#include <linux/of_address.h> > +#include <linux/of_platform.h> > + > +#define LUT_MAX_ENTRIES 40U > +#define CORE_COUNT_VAL(val) (((val) & (GENMASK(18, 16))) >> 16) > +#define LUT_ROW_SIZE 32 > +#define CLK_HW_DIV 2 > + > +enum { > + REG_ENABLE, > + REG_LUT_TABLE, > + REG_PERF_STATE, > + > + REG_ARRAY_SIZE, > +}; > + > +struct cpufreq_qcom { > + struct cpufreq_frequency_table *table; > + void __iomem *reg_bases[REG_ARRAY_SIZE]; > + cpumask_t related_cpus; > + unsigned int max_cores; > + unsigned long xo_rate; > + unsigned long cpu_hw_rate; > +}; > + > +static const u16 cpufreq_qcom_std_offsets[REG_ARRAY_SIZE] = { Is this going to change in the future? > + [REG_ENABLE] = 0x0, > + [REG_LUT_TABLE] = 0x110, > + [REG_PERF_STATE] = 0x920, > +}; > + > +static struct cpufreq_qcom *qcom_freq_domain_map[NR_CPUS]; > + > +static int > +qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy, > + unsigned int index) > +{ > + struct cpufreq_qcom *c = policy->driver_data; > + > + writel_relaxed(index, c->reg_bases[REG_PERF_STATE]); Why can't we avoid the indirection here and store the perf_state pointer in probe? Then we don't have to indirect through a table to perform the register write. > + > + return 0; > +} > + [..] > +static int qcom_resources_init(struct platform_device *pdev) > +{ > + struct device_node *cpu_np; > + struct of_phandle_args args; > + struct clk *clk; > + unsigned int cpu; > + unsigned long xo_rate, cpu_hw_rate; > + int ret; > + > + clk = clk_get(&pdev->dev, "xo"); > + if (IS_ERR(clk)) > + return PTR_ERR(clk); > + > + xo_rate = clk_get_rate(clk); > + > + clk_put(clk); > + > + clk = clk_get(&pdev->dev, "cpu_clk"); Sad that the name is cpu_clk, instead of something like 'backup' or whatever the name really is in hardware.
Hello Stephen, On 10/18/2018 5:02 AM, Stephen Boyd wrote: > Quoting Taniya Das (2018-10-11 04:36:01) >> --- a/drivers/cpufreq/Kconfig.arm >> +++ b/drivers/cpufreq/Kconfig.arm >> @@ -121,6 +121,17 @@ config ARM_QCOM_CPUFREQ_KRYO >> >> If in doubt, say N. >> >> +config ARM_QCOM_CPUFREQ_HW >> + bool "QCOM CPUFreq HW driver" > > Is there any reason this can't be a module? > We do not have any use cases where we need to support it as module. >> + depends on ARCH_QCOM || COMPILE_TEST >> + help >> + Support for the CPUFreq HW driver. >> + Some QCOM chipsets have a HW engine to offload the steps >> + necessary for changing the frequency of the CPUs. Firmware loaded >> + in this engine exposes a programming interface to the OS. >> + The driver implements the cpufreq interface for this HW engine. >> + Say Y if you want to support CPUFreq HW. >> + >> config ARM_S3C_CPUFREQ >> bool >> help >> diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c >> new file mode 100644 >> index 0000000..fe1c264 >> --- /dev/null >> +++ b/drivers/cpufreq/qcom-cpufreq-hw.c >> @@ -0,0 +1,354 @@ >> +// SPDX-License-Identifier: GPL-2.0 >> +/* >> + * Copyright (c) 2018, The Linux Foundation. All rights reserved. >> + */ >> + >> +#include <linux/cpufreq.h> >> +#include <linux/init.h> >> +#include <linux/kernel.h> >> +#include <linux/of_address.h> >> +#include <linux/of_platform.h> >> + >> +#define LUT_MAX_ENTRIES 40U >> +#define CORE_COUNT_VAL(val) (((val) & (GENMASK(18, 16))) >> 16) >> +#define LUT_ROW_SIZE 32 >> +#define CLK_HW_DIV 2 >> + >> +enum { >> + REG_ENABLE, >> + REG_LUT_TABLE, >> + REG_PERF_STATE, >> + >> + REG_ARRAY_SIZE, >> +}; >> + >> +struct cpufreq_qcom { >> + struct cpufreq_frequency_table *table; >> + void __iomem *reg_bases[REG_ARRAY_SIZE]; >> + cpumask_t related_cpus; >> + unsigned int max_cores; >> + unsigned long xo_rate; >> + unsigned long cpu_hw_rate; >> +}; >> + >> +static const u16 cpufreq_qcom_std_offsets[REG_ARRAY_SIZE] = { > > Is this going to change in the future? > Yes, they could change and that was the reason to introduce the offsets. This was discussed earlier too with Sudeep and was to add them. >> + [REG_ENABLE] = 0x0, >> + [REG_LUT_TABLE] = 0x110, >> + [REG_PERF_STATE] = 0x920, >> +}; >> + >> +static struct cpufreq_qcom *qcom_freq_domain_map[NR_CPUS]; >> + >> +static int >> +qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy, >> + unsigned int index) >> +{ >> + struct cpufreq_qcom *c = policy->driver_data; >> + >> + writel_relaxed(index, c->reg_bases[REG_PERF_STATE]); > > Why can't we avoid the indirection here and store the perf_state pointer > in probe? Then we don't have to indirect through a table to perform the > register write. > As the offsets could change and that was the reason to add this. >> + >> + return 0; >> +} >> + > [..] >> +static int qcom_resources_init(struct platform_device *pdev) >> +{ >> + struct device_node *cpu_np; >> + struct of_phandle_args args; >> + struct clk *clk; >> + unsigned int cpu; >> + unsigned long xo_rate, cpu_hw_rate; >> + int ret; >> + >> + clk = clk_get(&pdev->dev, "xo"); >> + if (IS_ERR(clk)) >> + return PTR_ERR(clk); >> + >> + xo_rate = clk_get_rate(clk); >> + >> + clk_put(clk); >> + >> + clk = clk_get(&pdev->dev, "cpu_clk"); > > Sad that the name is cpu_clk, instead of something like 'backup' or > whatever the name really is in hardware. > Sure, would update it.
Quoting Taniya Das (2018-11-02 20:06:00) > Hello Stephen, > > On 10/18/2018 5:02 AM, Stephen Boyd wrote: > > Quoting Taniya Das (2018-10-11 04:36:01) > >> --- a/drivers/cpufreq/Kconfig.arm > >> +++ b/drivers/cpufreq/Kconfig.arm > >> @@ -121,6 +121,17 @@ config ARM_QCOM_CPUFREQ_KRYO > >> > >> If in doubt, say N. > >> > >> +config ARM_QCOM_CPUFREQ_HW > >> + bool "QCOM CPUFreq HW driver" > > > > Is there any reason this can't be a module? > > > > We do not have any use cases where we need to support it as module. Ok, so it could easily be tristate then? Why not allow it? > > >> diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c > >> new file mode 100644 > >> index 0000000..fe1c264 > >> --- /dev/null > >> +++ b/drivers/cpufreq/qcom-cpufreq-hw.c > >> @@ -0,0 +1,354 @@ > >> +// SPDX-License-Identifier: GPL-2.0 > >> +/* > >> + * Copyright (c) 2018, The Linux Foundation. All rights reserved. > >> + */ [...] > >> + > >> +static const u16 cpufreq_qcom_std_offsets[REG_ARRAY_SIZE] = { > > > > Is this going to change in the future? > > > > Yes, they could change and that was the reason to introduce the offsets. > This was discussed earlier too with Sudeep and was to add them. > > >> + [REG_ENABLE] = 0x0, This is only used once? Maybe it could be removed. > >> + [REG_LUT_TABLE] = 0x110, And this is only used during probe to figure out the supported frequencies. So we definitely don't need to store around the registers after probe in an array of iomem pointers. The only one that we need after probe is the one below. > >> + [REG_PERF_STATE] = 0x920, > >> +}; > >> + > >> +static struct cpufreq_qcom *qcom_freq_domain_map[NR_CPUS]; > >> + > >> +static int > >> +qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy, > >> + unsigned int index) > >> +{ > >> + struct cpufreq_qcom *c = policy->driver_data; > >> + > >> + writel_relaxed(index, c->reg_bases[REG_PERF_STATE]); > > > > Why can't we avoid the indirection here and store the perf_state pointer > > in probe? Then we don't have to indirect through a table to perform the > > register write. > > > > As the offsets could change and that was the reason to add this. With fast switching we can avoid incurring any extra instructions, so please make another iomem pointer in the cpufreq_qcom struct just for writing the index or if possible, just pass the iomem pointer that points to the REG_PERF_STATE as the policy->driver_data variable here. Then we have the address in hand without any extra load. If my understanding is correct, we don't need to keep around anything besides this register address anyway so we should be able to just load it and write it immediately.
On Sat, Nov 03, 2018 at 08:36:00AM +0530, Taniya Das wrote: > Hello Stephen, > > On 10/18/2018 5:02 AM, Stephen Boyd wrote: > > Quoting Taniya Das (2018-10-11 04:36:01) > > > --- a/drivers/cpufreq/Kconfig.arm > > > +++ b/drivers/cpufreq/Kconfig.arm [...] > > > +static const u16 cpufreq_qcom_std_offsets[REG_ARRAY_SIZE] = { > > > > Is this going to change in the future? > > > > Yes, they could change and that was the reason to introduce the offsets. > This was discussed earlier too with Sudeep and was to add them. Sorry, I didn't like these registers to be coming from DT and I had the same question: will this keep changing ? And IIRC, the answer was yes. But I agree with Stephen, if and when we see the change, you can introduce the array and keep it simple until then. -- Regards, Sudeep
Hello Stephen, Thanks for your comments. On 11/4/2018 9:50 AM, Stephen Boyd wrote: > Quoting Taniya Das (2018-11-02 20:06:00) >> Hello Stephen, >> >> On 10/18/2018 5:02 AM, Stephen Boyd wrote: >>> Quoting Taniya Das (2018-10-11 04:36:01) >>>> --- a/drivers/cpufreq/Kconfig.arm >>>> +++ b/drivers/cpufreq/Kconfig.arm >>>> @@ -121,6 +121,17 @@ config ARM_QCOM_CPUFREQ_KRYO >>>> >>>> If in doubt, say N. >>>> >>>> +config ARM_QCOM_CPUFREQ_HW >>>> + bool "QCOM CPUFreq HW driver" >>> >>> Is there any reason this can't be a module? >>> >> >> We do not have any use cases where we need to support it as module. > > Ok, so it could easily be tristate then? Why not allow it? > I have checked other vendors CPUfreq drivers and those too support only "bool". >> >>>> diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c >>>> new file mode 100644 >>>> index 0000000..fe1c264 >>>> --- /dev/null >>>> +++ b/drivers/cpufreq/qcom-cpufreq-hw.c >>>> @@ -0,0 +1,354 @@ >>>> +// SPDX-License-Identifier: GPL-2.0 >>>> +/* >>>> + * Copyright (c) 2018, The Linux Foundation. All rights reserved. >>>> + */ > [...] >>>> + >>>> +static const u16 cpufreq_qcom_std_offsets[REG_ARRAY_SIZE] = { >>> >>> Is this going to change in the future? >>> >> >> Yes, they could change and that was the reason to introduce the offsets. >> This was discussed earlier too with Sudeep and was to add them. >> >>>> + [REG_ENABLE] = 0x0, > > This is only used once? Maybe it could be removed. > >>>> + [REG_LUT_TABLE] = 0x110, > > And this is only used during probe to figure out the supported > frequencies. So we definitely don't need to store around the registers > after probe in an array of iomem pointers. The only one that we need > after probe is the one below. > >>>> + [REG_PERF_STATE] = 0x920, >>>> +}; >>>> + As these address offsets could change, so I am of the opinion to leave them as it is. >>>> +static struct cpufreq_qcom *qcom_freq_domain_map[NR_CPUS]; >>>> + >>>> +static int >>>> +qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy, >>>> + unsigned int index) >>>> +{ >>>> + struct cpufreq_qcom *c = policy->driver_data; >>>> + >>>> + writel_relaxed(index, c->reg_bases[REG_PERF_STATE]); >>> >>> Why can't we avoid the indirection here and store the perf_state pointer >>> in probe? Then we don't have to indirect through a table to perform the >>> register write. >>> >> >> As the offsets could change and that was the reason to add this. > > With fast switching we can avoid incurring any extra instructions, so > please make another iomem pointer in the cpufreq_qcom struct just for > writing the index or if possible, just pass the iomem pointer that > points to the REG_PERF_STATE as the policy->driver_data variable here. > Then we have the address in hand without any extra load. If my > understanding is correct, we don't need to keep around anything besides > this register address anyway so we should be able to just load it and > write it immediately. > The c->reg_bases[] is just an index to the updated bases addresses. I am not clear as to why it would incur an extra instruction. The below code would already take care of it. + for (i = REG_ENABLE; i < REG_ARRAY_SIZE; i++) + c->reg_bases[i] = base + offsets[i]; +
On Sun, Nov 11, 2018 at 06:12:29PM +0530, Taniya Das wrote: > Hello Stephen, > > Thanks for your comments. > > On 11/4/2018 9:50 AM, Stephen Boyd wrote: > > Quoting Taniya Das (2018-11-02 20:06:00) > > > Hello Stephen, > > > > > > On 10/18/2018 5:02 AM, Stephen Boyd wrote: > > > > Quoting Taniya Das (2018-10-11 04:36:01) > > > > > --- a/drivers/cpufreq/Kconfig.arm > > > > > +++ b/drivers/cpufreq/Kconfig.arm > > > > > @@ -121,6 +121,17 @@ config ARM_QCOM_CPUFREQ_KRYO > > > > > > > > > > If in doubt, say N. > > > > > > > > > > +config ARM_QCOM_CPUFREQ_HW > > > > > + bool "QCOM CPUFreq HW driver" > > > > > > > > Is there any reason this can't be a module? > > > > > > > > > > We do not have any use cases where we need to support it as module. > > > > Ok, so it could easily be tristate then? Why not allow it? > > > > I have checked other vendors CPUfreq drivers and those too support only > "bool". That's not entirely correct. Most drivers in Kconfig are 'tristate' and about 50% of those in KConfig.arm are. I'd say make it 'tristate' unless there are good reasons not to do so. > > > > > diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c > > > > > new file mode 100644 > > > > > index 0000000..fe1c264 > > > > > --- /dev/null > > > > > +++ b/drivers/cpufreq/qcom-cpufreq-hw.c > > > > > @@ -0,0 +1,354 @@ > > > > > +// SPDX-License-Identifier: GPL-2.0 > > > > > +/* > > > > > + * Copyright (c) 2018, The Linux Foundation. All rights reserved. > > > > > + */ > > [...] > > > > > + > > > > > +static const u16 cpufreq_qcom_std_offsets[REG_ARRAY_SIZE] = { > > > > > > > > Is this going to change in the future? > > > > > > > > > > Yes, they could change and that was the reason to introduce the offsets. > > > This was discussed earlier too with Sudeep and was to add them. > > > > > > > > + [REG_ENABLE] = 0x0, > > > > This is only used once? Maybe it could be removed. > > > > > > > + [REG_LUT_TABLE] = 0x110, > > > > And this is only used during probe to figure out the supported > > frequencies. So we definitely don't need to store around the registers > > after probe in an array of iomem pointers. The only one that we need > > after probe is the one below. > > > > > > > + [REG_PERF_STATE] = 0x920, > > > > > +}; > > > > > + > > As these address offsets could change, so I am of the opinion to leave them > as it is. As of now there is only one set of offsets. Let's just keep the code simple while this is the case and address different offsets when it is actually needed, as suggested by Stephen and Sudeep. > > > > > +static struct cpufreq_qcom *qcom_freq_domain_map[NR_CPUS]; > > > > > + > > > > > +static int > > > > > +qcom_cpufreq_hw_target_index(struct cpufreq_policy *policy, > > > > > + unsigned int index) > > > > > +{ > > > > > + struct cpufreq_qcom *c = policy->driver_data; > > > > > + > > > > > + writel_relaxed(index, c->reg_bases[REG_PERF_STATE]); > > > > > > > > Why can't we avoid the indirection here and store the perf_state pointer > > > > in probe? Then we don't have to indirect through a table to perform the > > > > register write. > > > > > > > > > > As the offsets could change and that was the reason to add this. > > > > With fast switching we can avoid incurring any extra instructions, so > > please make another iomem pointer in the cpufreq_qcom struct just for > > writing the index or if possible, just pass the iomem pointer that > > points to the REG_PERF_STATE as the policy->driver_data variable here. > > Then we have the address in hand without any extra load. If my > > understanding is correct, we don't need to keep around anything besides > > this register address anyway so we should be able to just load it and > > write it immediately. > > > > The c->reg_bases[] is just an index to the updated bases addresses. I am not > clear as to why it would incur an extra instruction. > > The below code would already take care of it. > > + for (i = REG_ENABLE; i < REG_ARRAY_SIZE; i++) > + c->reg_bases[i] = base + offsets[i]; > + >From a performance point of view using a direct iomem pointer seems like a micro-optimization that probably doesn't have a measurable impact. However I think the code shouldn't be more complex than necessary, and at this point the indirection isn't needed. Cheers Matthias
Quoting Matthias Kaehlcke (2018-11-15 16:23:37) > On Sun, Nov 11, 2018 at 06:12:29PM +0530, Taniya Das wrote: > > On 11/4/2018 9:50 AM, Stephen Boyd wrote: > > > Quoting Taniya Das (2018-11-02 20:06:00) > > > > On 10/18/2018 5:02 AM, Stephen Boyd wrote: > > > > > Quoting Taniya Das (2018-10-11 04:36:01) > > > > > > --- a/drivers/cpufreq/Kconfig.arm > > > > > > +++ b/drivers/cpufreq/Kconfig.arm > > > > > > @@ -121,6 +121,17 @@ config ARM_QCOM_CPUFREQ_KRYO > > > > > > > > > > > > If in doubt, say N. > > > > > > > > > > > > +config ARM_QCOM_CPUFREQ_HW > > > > > > + bool "QCOM CPUFreq HW driver" > > > > > > > > > > Is there any reason this can't be a module? > > > > > > > > > > > > > We do not have any use cases where we need to support it as module. > > > > > > Ok, so it could easily be tristate then? Why not allow it? > > > > > > > I have checked other vendors CPUfreq drivers and those too support only > > "bool". > > That's not entirely correct. Most drivers in Kconfig are 'tristate' > and about 50% of those in KConfig.arm are. I'd say make it 'tristate' > unless there are good reasons not to do so. Yes, please make tristate. > > > > > > > diff --git a/drivers/cpufreq/qcom-cpufreq-hw.c b/drivers/cpufreq/qcom-cpufreq-hw.c > > > > > > new file mode 100644 > > > > > > index 0000000..fe1c264 > > > > > > --- /dev/null > > > > > > +++ b/drivers/cpufreq/qcom-cpufreq-hw.c > > > > > > @@ -0,0 +1,354 @@ > > > > > > +// SPDX-License-Identifier: GPL-2.0 > > > > > > +/* > > > > > > + * Copyright (c) 2018, The Linux Foundation. All rights reserved. > > > > > > + */ > > > [...] > > > > > > + > > > > > > +static const u16 cpufreq_qcom_std_offsets[REG_ARRAY_SIZE] = { > > > > > > > > > > Is this going to change in the future? > > > > > > > > > > > > > Yes, they could change and that was the reason to introduce the offsets. > > > > This was discussed earlier too with Sudeep and was to add them. > > > > > > > > > > + [REG_ENABLE] = 0x0, > > > > > > This is only used once? Maybe it could be removed. > > > > > > > > > + [REG_LUT_TABLE] = 0x110, > > > > > > And this is only used during probe to figure out the supported > > > frequencies. So we definitely don't need to store around the registers > > > after probe in an array of iomem pointers. The only one that we need > > > after probe is the one below. > > > > > > > > > + [REG_PERF_STATE] = 0x920, > > > > > > +}; > > > > > > + > > > > As these address offsets could change, so I am of the opinion to leave them > > as it is. > > As of now there is only one set of offsets. Let's just keep the code > simple while this is the case and address different offsets when it is > actually needed, as suggested by Stephen and Sudeep. Yes, please simplify by getting rid of this and not storing anything in the struct that's only used during probe. > > > > > > > With fast switching we can avoid incurring any extra instructions, so > > > please make another iomem pointer in the cpufreq_qcom struct just for > > > writing the index or if possible, just pass the iomem pointer that > > > points to the REG_PERF_STATE as the policy->driver_data variable here. > > > Then we have the address in hand without any extra load. If my > > > understanding is correct, we don't need to keep around anything besides > > > this register address anyway so we should be able to just load it and > > > write it immediately. > > > > > > > The c->reg_bases[] is just an index to the updated bases addresses. I am not > > clear as to why it would incur an extra instruction. > > > > The below code would already take care of it. > > > > + for (i = REG_ENABLE; i < REG_ARRAY_SIZE; i++) > > + c->reg_bases[i] = base + offsets[i]; > > + > > From a performance point of view using a direct iomem pointer > seems like a micro-optimization that probably doesn't have a > measurable impact. However I think the code shouldn't be more complex > than necessary, and at this point the indirection isn't needed. > Yes it's a micro-optimization for sure, in the task switching path so it may actually be useful. Either way, I think we can greatly simplify by just having the iomem pointer be the only pointer that is stored in the policy driver_data.
[v9] * Update the Documentation binding for freq-domain-cells & cpufreq node. * Address comments in Kconfig.arm & Makefile. * Remove include file & MODULE_DESCRIPTION not required. * Fix the code for 'of_node_put(cpu_np)'. [v8] * Address comments to update code to take cpufreq_hw phandle and index from the CPU nodes. * Updated the Documentation for the above change in DT. * Updated logic for assigning 'qcom_freq_domain_map' for related CPUs. * Clock input to the HW block is taken from DT which has been updated in code and Device tree documentation. [v7] * Updated the logic to check for related CPUs. [v6] * Renamed match table 'qcom_cpufreq_hw_match'. * Renamed 'qcom_read_lut' to 'qcom_cpufreq_hw_read_lut'. * Updated the logic to check for related CPUs at the beginning of the 'qcom_cpu_resources_init'. * Use devm_ioremap_resource instead of devm_ioremap. * Update the use of of_node_put to handle error conditions. * Use policy->cached_resolved_idx in fast switch callback. * Keep precalculated offsets 'reg_bases'. * XO clock is taken from Device tree. * Update documentation binding for clocks/clock-names. * Minor comments in Kconfig.arm. * Comments to move dev_info to dev_dbg. [v5] * Remove mapping different register regions of perf/lut/enable, instead map the entire HW region. * Add reg_offset/cpufreq_qcom_std_offsets to be supplied as device data. * Check of src == 0 during lut read. * Add of_node_put(cpu_np) in qcom_get_related_cpus * Update the qcom_cpu_resources_init for register offset data, and cleanup the related cpus to keep a single copy of CPUfreq. * Replace FW with HW, update Kconfig, rename filename qcom-cpufreq-hw.c * Update the documentation binding to reflect the changes of mapping the * entire HW region. [v4] * Fixed console messages as per comments. * Return error from qcom_resources_init() in the cases where failed to get frequency domain. * Rename cpu_dev to cpu_np in qcom_resources_init, qcom_get_related_cpus(). Also use temp variable freq_np in qcom_get_related_cpus(). * Update qcom_cpufreq_fw_get() to use the policy data to incoporate the hotplug use case. * Update code to use of fast_switching. * Check for !c->max_cores instead of cpumask_empty in qcom_get_related_cpus(). * Update the logic of assigning 'c' to qcom_freq_domain_map[cpu]. [v3] * Remove index check from 'qcom_cpufreq_fw_target_index'. * Update the Documentation binding to add the platform specific properties in the CPU nodes, node name "qcom,freq-domain". * Update return value to '0' from -ENODEV from 'qcom_cpufreq_fw_get'. * Update the logic for boost frequency to use local variables instead of cpufreq driver data in 'qcom_read_lut'. * Update the logic in 'qcom_get_related_cpus' to find the related cpus. * Update the reg-names to remove "_base" and also update the binding with the description of these registers. * Update the logic in 'qcom_resources_init' to address the new device tree notation of handling the frequency domain phandles. [v2] * Fixed the alignment issues in "qcom_cpufreq_fw_target_index" for dev_err and also for "qcom_cpu_resources_init". * Removed ret = 0 from qcom_get_related_cpus and added to check for cpu_mask_empty to return -ENOENT. * Fixes qcom_cpu_resources_init function * Remove initialization of 'index' * Check for valid 'c' * Removed initialization of 'prev_cc' from 'qcom_read_lut'. Taniya Das (2): dt-bindings: cpufreq: Introduce QCOM CPUFREQ Firmware bindings cpufreq: qcom-hw: Add support for QCOM cpufreq HW driver .../bindings/cpufreq/cpufreq-qcom-hw.txt | 173 ++++++++++ drivers/cpufreq/Kconfig.arm | 11 + drivers/cpufreq/Makefile | 1 + drivers/cpufreq/qcom-cpufreq-hw.c | 354 +++++++++++++++++++++ 4 files changed, 539 insertions(+) create mode 100644 Documentation/devicetree/bindings/cpufreq/cpufreq-qcom-hw.txt create mode 100644 drivers/cpufreq/qcom-cpufreq-hw.c -- Qualcomm INDIA, on behalf of Qualcomm Innovation Center, Inc.is a member of the Code Aurora Forum, hosted by the Linux Foundation.