Message ID | 1531745857-5561-1-git-send-email-alexandre.torgue@st.com |
---|---|
Headers | show |
Series | STM32 pinctrl updates | expand |
On Mon, Jul 16, 2018 at 2:57 PM Alexandre Torgue <alexandre.torgue@st.com> wrote: > Register a new GPIO bank only if GPIO bank node is enabled. This patch also > adds checks on ranges which are defined only if a bank is registered. > > Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> Patch applied. Alexandre can you check the discussion we've had about using GPIOLIB_IRQCHIP for multi-bank GPIOs with several IRQ lines as per drivers/gpio/gpio-tegra186.c? Is this approach applicable for STM32 so we can pull more stuff in under GPIOLIB_IRQCHIP? Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hi Linus On 07/29/2018 10:11 PM, Linus Walleij wrote: > On Mon, Jul 16, 2018 at 2:57 PM Alexandre Torgue > <alexandre.torgue@st.com> wrote: > >> Register a new GPIO bank only if GPIO bank node is enabled. This patch also >> adds checks on ranges which are defined only if a bank is registered. >> >> Signed-off-by: Alexandre Torgue <alexandre.torgue@st.com> > > Patch applied. > Thanks > Alexandre can you check the discussion we've had about using > GPIOLIB_IRQCHIP for multi-bank GPIOs with several IRQ > lines as per drivers/gpio/gpio-tegra186.c? > > Is this approach applicable for STM32 so we can pull > more stuff in under GPIOLIB_IRQCHIP? > Ok. I'm going to check what's possible to do. I let you know soon. regards Alex > Yours, > Linus Walleij > -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html