From patchwork Fri Feb 2 14:03:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gabriel Fernandez X-Patchwork-Id: 868583 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 3zXzJY5ycqz9t20 for ; Sat, 3 Feb 2018 01:05:01 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752207AbeBBOE7 (ORCPT ); Fri, 2 Feb 2018 09:04:59 -0500 Received: from mx08-00178001.pphosted.com ([91.207.212.93]:51481 "EHLO mx07-00178001.pphosted.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1752135AbeBBOEl (ORCPT ); Fri, 2 Feb 2018 09:04:41 -0500 Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx08-.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id w12E3qJB028133; Fri, 2 Feb 2018 15:04:10 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx08-00178001.pphosted.com with ESMTP id 2fvr42rg1m-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Feb 2018 15:04:10 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id DD82231; Fri, 2 Feb 2018 14:04:08 +0000 (GMT) Received: from Webmail-eu.st.com (sfhdag4node2.st.com [10.75.127.11]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id B5AA7522A; Fri, 2 Feb 2018 14:04:08 +0000 (GMT) Received: from localhost (10.75.127.47) by SFHDAG4NODE2.st.com (10.75.127.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Fri, 2 Feb 2018 15:04:08 +0100 From: To: Rob Herring , Mark Rutland , Lee Jones , Maxime Coquelin , Alexandre Torgue , Michael Turquette , Stephen Boyd , Gabriel Fernandez CC: , , , , , Subject: [PATCH 00/14] Introduce STM32MP1 clock driver Date: Fri, 2 Feb 2018 15:03:28 +0100 Message-ID: <1517580222-23301-1-git-send-email-gabriel.fernandez@st.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.75.127.47] X-ClientProxiedBy: SFHDAG6NODE2.st.com (10.75.127.17) To SFHDAG4NODE2.st.com (10.75.127.11) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-02_04:, , signatures=0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Gabriel Fernandez This patch-set introduces clock driver for STM32MP157 based on Arm Cortex-A7. The driver patch is splitted in several patches (by kind of clock) to facilitate code reviewing. Gabriel Fernandez (14): dt-bindings: Document STM32MP1 Reset Clock Controller (RCC) bindings dt-bindings: clock: add STM32MP1 clocks clk: stm32mp1: Introduce STM32MP1 clock driver clk: stm32mp1: add MP1 gate for osc hse/hsi/csi oscillators clk: stm32mp1: add Source Clocks for PLLs clk: stm32mp1: add PLL clocks clk: stm32mp1: add Post-dividers for PLL clk: stm32mp1: add Sub System clocks clk: stm32mp1: add Kernel timers clk: stm32mp1: add Peripheral clocks clk: stm32mp1: add Kernel clocks clk: stm32mp1: add RTC clock clk: stm32mp1: add MCO clocks clk: stm32mp1: add Debug clocks .../devicetree/bindings/mfd/st,stm32-rcc.txt | 85 + drivers/clk/Kconfig | 6 + drivers/clk/Makefile | 1 + drivers/clk/clk-stm32mp1.c | 1705 ++++++++++++++++++++ include/dt-bindings/clock/stm32mp1-clks.h | 248 +++ 5 files changed, 2045 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/st,stm32-rcc.txt create mode 100644 drivers/clk/clk-stm32mp1.c create mode 100644 include/dt-bindings/clock/stm32mp1-clks.h