diff mbox series

[06/16] arch/Config.in.x86: westmere and silvermont were added in gcc 4.9

Message ID 20220124230116.203218-7-thomas.petazzoni@bootlin.com
State Accepted
Headers show
Series Bootlin toolchain updates and x86 updates | expand

Commit Message

Thomas Petazzoni Jan. 24, 2022, 11:01 p.m. UTC
These were added in gcc commit
d3c11974032e21121a051d423a1d71097edf752f ("Use proper Intel processor
names for -march=/-mtune=") which was merged in gcc 4.9.

Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
---
 arch/Config.in.x86 | 2 ++
 1 file changed, 2 insertions(+)
diff mbox series

Patch

diff --git a/arch/Config.in.x86 b/arch/Config.in.x86
index 4beb11662d..0aae26799c 100644
--- a/arch/Config.in.x86
+++ b/arch/Config.in.x86
@@ -196,6 +196,7 @@  config BR2_x86_westmere
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_corei7_avx
 	bool "corei7-avx"
 	select BR2_X86_CPU_HAS_MMX
@@ -273,6 +274,7 @@  config BR2_x86_silvermont
 	select BR2_X86_CPU_HAS_SSSE3
 	select BR2_X86_CPU_HAS_SSE4
 	select BR2_X86_CPU_HAS_SSE42
+	select BR2_ARCH_NEEDS_GCC_AT_LEAST_4_9
 config BR2_x86_k6
 	bool "k6"
 	depends on !BR2_x86_64