From patchwork Mon Aug 22 10:12:28 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Matt Flax X-Patchwork-Id: 661389 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from silver.osuosl.org (smtp3.osuosl.org [140.211.166.136]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3sHqBf4pD0z9t0p for ; Mon, 22 Aug 2016 20:12:42 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by silver.osuosl.org (Postfix) with ESMTP id C1D3B2DEFF; Mon, 22 Aug 2016 10:12:39 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org Received: from silver.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id xGJl-VUTH2n7; Mon, 22 Aug 2016 10:12:37 +0000 (UTC) Received: from ash.osuosl.org (ash.osuosl.org [140.211.166.34]) by silver.osuosl.org (Postfix) with ESMTP id E5FDC26878; Mon, 22 Aug 2016 10:12:36 +0000 (UTC) X-Original-To: buildroot@lists.busybox.net Delivered-To: buildroot@osuosl.org Received: from whitealder.osuosl.org (smtp1.osuosl.org [140.211.166.138]) by ash.osuosl.org (Postfix) with ESMTP id 246F41C24DC for ; Mon, 22 Aug 2016 10:12:36 +0000 (UTC) Received: from localhost (localhost [127.0.0.1]) by whitealder.osuosl.org (Postfix) with ESMTP id 21C088957A for ; Mon, 22 Aug 2016 10:12:36 +0000 (UTC) X-Virus-Scanned: amavisd-new at osuosl.org X-Amavis-Alert: BAD HEADER SECTION, Improper folded header field made up entirely of whitespace (char 20 hex): X-Spam-Report: ...T_ADDRESS@@ for details.\n \n Content previ[...] Received: from whitealder.osuosl.org ([127.0.0.1]) by localhost (.osuosl.org [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id su4IiC7mWJg6 for ; Mon, 22 Aug 2016 10:12:34 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.7.6 Received: from nskntmtas03p.mx.bigpond.com (nskntmtas03p.mx.bigpond.com [61.9.168.143]) by whitealder.osuosl.org (Postfix) with ESMTPS id 4A0C089C1B for ; Mon, 22 Aug 2016 10:12:33 +0000 (UTC) Received: from nskntcmgw08p ([61.9.169.168]) by nskntmtas03p.mx.bigpond.com with ESMTP id <20160822101230.KGMQ2042.nskntmtas03p.mx.bigpond.com@nskntcmgw08p> for ; Mon, 22 Aug 2016 10:12:30 +0000 Received: from meb ([124.190.105.82]) by nskntcmgw08p with BigPond Outbound id aACW1t00J1mhCic01ACWpl; Mon, 22 Aug 2016 10:12:30 +0000 X-Authority-Analysis: v=2.1 cv=DL5ymH5b c=1 sm=1 tr=0 a=j2gF+hSnfl5JSr2jVBK1AQ==:117 a=j2gF+hSnfl5JSr2jVBK1AQ==:17 a=L9H7d07YOLsA:10 a=9cW_t1CCXrUA:10 a=s5jvgZ67dGcA:10 a=7z1cN_iqozsA:10 a=quVeovP3AAAA:8 a=VFxJyTqUjdoqagdQ0cUA:9 a=7Zwj6sZBwVKJAoWSPKxL6X1jA+E=:19 a=AZ-0r2VTK9MkIlfBvydC:22 Received: from monstilationax2 ([192.168.0.51] helo=monstilationax2.telstra.com.au) by meb with esmtp (Exim 4.84_2) (envelope-from ) id 1bbmHQ-0001BD-FL; Mon, 22 Aug 2016 20:16:33 +1000 Received: by monstilationax2.telstra.com.au (Postfix, from userid 1000) id 44D1E340189F; Mon, 22 Aug 2016 20:12:29 +1000 (AEST) From: Matt Flax To: buildroot@buildroot.org Date: Mon, 22 Aug 2016 20:12:28 +1000 Message-Id: <1471860748-5126-1-git-send-email-flatmax@flatmax.org> X-Mailer: git-send-email 2.7.4 Cc: Matt Flax Subject: [Buildroot] [PATCH 3/3] arch/arm: Add ARMV8 (aarch32) toolchain config. X-BeenThere: buildroot@busybox.net X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Discussion and development of buildroot List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: buildroot-bounces@busybox.net Sender: "buildroot" This commit configures the toolchain to use the ARMV8 hardware features. This commit also cleans up and adds to the previous cortex-a53 commit. This commit adds BR2_ARM_CPU_HAS_ARMV8 to arch/Config.in.arm and cleans up the BR2_cortex_a53 config to remove redundant selections relating to VFPV4 and ARMV7A. The commit also adds BR2_ARM_CPU_HAS_ARMV8 to BR2_ARM_EABIHF which allows the selection of hard float (HF) activating the toolchain for whatever specific ARMV8 hardware features are possible. It also adds the BR2_ARM_FPU_NEON_ARMV8 HF tuning (crypto-neon-fp-armv8). The cortex-a53 BR2_ARCH_HAS_MMU_OPTIONAL selection ensures that uclibc successfully compiles without non-compliant swp assembly calls. Signed-off-by: Matt Flax --- arch/Config.in.arm | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/arch/Config.in.arm b/arch/Config.in.arm index 72bb744..c01daf6 100644 --- a/arch/Config.in.arm +++ b/arch/Config.in.arm @@ -31,6 +31,9 @@ config BR2_ARM_CPU_HAS_VFPV4 bool select BR2_ARM_CPU_HAS_VFPV3 +config BR2_ARM_CPU_HAS_ARMV8 + bool + config BR2_ARM_CPU_HAS_ARM bool @@ -174,8 +177,7 @@ config BR2_cortex_a53 bool "cortex-A53" select BR2_ARM_CPU_HAS_ARM select BR2_ARM_CPU_HAS_NEON - select BR2_ARM_CPU_HAS_VFPV4 - select BR2_ARM_CPU_ARMV7A + select BR2_ARM_CPU_HAS_ARMV8 select BR2_ARCH_HAS_MMU_OPTIONAL config BR2_cortex_m3 bool "cortex-M3" @@ -271,7 +273,7 @@ config BR2_ARM_EABI config BR2_ARM_EABIHF bool "EABIhf" - depends on BR2_ARM_CPU_HAS_VFPV2 + depends on BR2_ARM_CPU_HAS_VFPV2 || BR2_ARM_CPU_HAS_ARMV8 help The EABIhf is an extension of EABI which supports the 'hard' floating point model. This model uses the floating point @@ -292,6 +294,7 @@ endchoice choice prompt "Floating point strategy" depends on BR2_ARM_EABI || BR2_ARM_EABIHF + default BR2_ARM_FPU_NEON_ARMV8 if BR2_ARM_CPU_HAS_ARMV8 default BR2_ARM_FPU_VFPV4D16 if BR2_ARM_CPU_HAS_VFPV4 default BR2_ARM_FPU_VFPV3D16 if BR2_ARM_CPU_HAS_VFPV3 default BR2_ARM_FPU_VFPV2 if BR2_ARM_CPU_HAS_VFPV2 @@ -366,6 +369,13 @@ config BR2_ARM_FPU_VFPV4 cores, including the earlier Cortex-A{8, 9}, you should instead select VFPv3. +config BR2_ARM_FPU_NEON_ARMV8 + bool "ARMV8" + depends on BR2_ARM_CPU_HAS_ARMV8 + help + This option allows to use the ARMV8 floating point unit, as + available in some ARMv8 processors (Cortex-A53). + config BR2_ARM_FPU_VFPV4D16 bool "VFPv4-D16" depends on BR2_ARM_CPU_HAS_VFPV4 @@ -485,6 +495,7 @@ config BR2_GCC_TARGET_FPU default "vfpv4-d16" if BR2_ARM_FPU_VFPV4D16 default "neon" if BR2_ARM_FPU_NEON default "neon-vfpv4" if BR2_ARM_FPU_NEON_VFPV4 + default "crypto-neon-fp-armv8" if BR2_ARM_FPU_NEON_ARMV8 config BR2_GCC_TARGET_FLOAT_ABI default "soft" if BR2_ARM_SOFT_FLOAT