Message ID | 20181115124748.268286-6-pn@denx.de |
---|---|
State | New |
Headers | show |
Series | Add Actions Semi S700 pinctrl support | expand |
On Thu, Nov 15, 2018 at 1:48 PM Parthiban Nallathambi <pn@denx.de> wrote: > From: Saravanan Sekar <sravanhome@gmail.com> > > Add pinctrl nodes for Actions Semi S700 SoC > > Signed-off-by: Parthiban Nallathambi <pn@denx.de> > Signed-off-by: Saravanan Sekar <sravanhome@gmail.com> > Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Please merge this through the ARM SoC tree. Yours, Linus Walleij
On Mon, Nov 19, 2018 at 02:13:25PM +0100, Linus Walleij wrote: > On Thu, Nov 15, 2018 at 1:48 PM Parthiban Nallathambi <pn@denx.de> wrote: > > > From: Saravanan Sekar <sravanhome@gmail.com> > > > > Add pinctrl nodes for Actions Semi S700 SoC > > > > Signed-off-by: Parthiban Nallathambi <pn@denx.de> > > Signed-off-by: Saravanan Sekar <sravanhome@gmail.com> > > Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> > > Reviewed-by: Linus Walleij <linus.walleij@linaro.org> > > Please merge this through the ARM SoC tree. > Applied to dt-next branch of my tree with Linus's Reviewed-by tag. Thanks, Mani > Yours, > Linus Walleij
diff --git a/arch/arm64/boot/dts/actions/s700.dtsi b/arch/arm64/boot/dts/actions/s700.dtsi index 192c7b39c8c1..dceadb945da3 100644 --- a/arch/arm64/boot/dts/actions/s700.dtsi +++ b/arch/arm64/boot/dts/actions/s700.dtsi @@ -186,5 +186,21 @@ interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "timer1"; }; + + pinctrl: pinctrl@e01b0000 { + compatible = "actions,s700-pinctrl"; + reg = <0x0 0xe01b0000 0x0 0x1000>; + clocks = <&cmu CLK_GPIO>; + gpio-controller; + gpio-ranges = <&pinctrl 0 0 136>; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; + }; }; };