From patchwork Sat Nov 10 21:18:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= X-Patchwork-Id: 996010 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-tegra-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rere.qmqm.pl Authentication-Results: ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=rere.qmqm.pl header.i=@rere.qmqm.pl header.b="T4UtBfbH"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42sqcj6tYMz9sC7 for ; Sun, 11 Nov 2018 08:18:13 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1725772AbeKKHEd (ORCPT ); Sun, 11 Nov 2018 02:04:33 -0500 Received: from rere.qmqm.pl ([91.227.64.183]:44261 "EHLO rere.qmqm.pl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725779AbeKKHEd (ORCPT ); Sun, 11 Nov 2018 02:04:33 -0500 Received: from remote.user (localhost [127.0.0.1]) by rere.qmqm.pl (Postfix) with ESMTPSA id 42sqbV2TFgzSP; Sat, 10 Nov 2018 22:17:10 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=rere.qmqm.pl; s=1; t=1541884630; bh=a2zvD6fDwiGmTs7yAJQTzM//ZEEPCAiduE0XRDrFnec=; h=Date:In-Reply-To:References:From:Subject:To:Cc:From; b=T4UtBfbH08BEDjXTDzGoFv3V8//CdmuMVCLvJS86z32DMNtWnKjVabjAZYKpZ/XfN e4WEG86RmCZRhqC3wOTIGD103W6aUylwUsOfcm75JDHO8uX6hnv8lg4C3szdn09XXC ITCFduwLVMKIir0NJPdXmZIaFa8XKp79CpnIMFu2Z0NSqK6jMbrknF3FFJv5z5ZZk6 klXvxGy6Mq15r8lFcrCNvEzgNj408Fql780CxstKDTkZZX/7uHFYF+8yFPetRFtWej 8WmsLCiCD+DlQ2XfybaGYQ57ERyvhCL1cXqtlXQ48hsZ7UPHxzDD4VBCJm3DR3IKFG kFA6GfdeAtXLQ== X-Virus-Status: Clean X-Virus-Scanned: clamav-milter 0.100.2 at mail Date: Sat, 10 Nov 2018 22:18:09 +0100 Message-Id: In-Reply-To: References: From: =?utf-8?b?TWljaGHFgiBNaXJvc8WCYXc=?= Subject: [PATCH 2/2] ARM: tegra: avoid touching Secure registers in reset handler MIME-Version: 1.0 To: linux-tegra@vger.kernel.org Cc: Dmitry Osipenko , Jonathan Hunter , linux-arm-kernel@lists.infradead.org, Russell King , Thierry Reding Sender: linux-tegra-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-tegra@vger.kernel.org This allows secondary CPUs to boot with Trusted Foundations firmware. Signed-off-by: Michał Mirosław --- arch/arm/mach-tegra/reset-handler.S | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/arch/arm/mach-tegra/reset-handler.S b/arch/arm/mach-tegra/reset-handler.S index fe4c568aeace..56300ec9f1a0 100644 --- a/arch/arm/mach-tegra/reset-handler.S +++ b/arch/arm/mach-tegra/reset-handler.S @@ -139,6 +139,13 @@ ENTRY(__tegra_cpu_reset_handler) cpsid aif, 0x13 @ SVC mode, interrupts disabled tegra_get_soc_id TEGRA_APB_MISC_BASE, r6 + +#ifdef CONFIG_TRUSTED_FOUNDATIONS + adr r3, __tegra_cpu_reset_handler_data + ldr r0, [r3, #RESET_DATA(TF_PRESENT)] + cmp r0, #0 + bne after_errata +#endif /* CONFIG_TRUSTED_FOUNDATIONS */ #ifdef CONFIG_ARCH_TEGRA_2x_SOC t20_check: cmp r6, #TEGRA20