Patchwork [committed] Fix PR target/49305

login
register
mail settings
Submitter Kaz Kojima
Date June 8, 2011, 11:14 p.m.
Message ID <20110609.081456.330800945.kkojima@rr.iij4u.or.jp>
Download mbox | patch
Permalink /patch/99585/
State New
Headers show

Comments

Kaz Kojima - June 8, 2011, 11:14 p.m.
Hi,

My patch r174586 on trunk was a bit incomplete and causes
PR49305 on sh2a target.  The attached patch is to fix it.
Tested on sh-elf and sh4-unknown-linux-gnu and applied on
trunk.

BTW, when looking into PR, I noticed that we forgot to utilize
32-bit mov.w instructions on sh2a while 32-bit mov.[bl]
instructions are enabled on that target already.  I'll prepare
the patch for it.

Regards,
	kaz
--
2011-06-08  Kaz Kojima  <kkojima@gcc.gnu.org>

	PR target/49305
	* config/sh/predicates.md (general_movsrc_operand): Check
	mode for memory with indexed address for QI and HImode.
	(general_movdst_operand): Likewise.

Patch

--- ORIG/trunk/gcc/config/sh/predicates.md	2011-06-04 10:16:51.000000000 +0900
+++ trunk/gcc/config/sh/predicates.md	2011-06-08 18:55:09.000000000 +0900
@@ -395,6 +395,7 @@ 
     }
 
   if ((mode == QImode || mode == HImode)
+      && mode == GET_MODE (op)
       && (MEM_P (op)
 	  || (GET_CODE (op) == SUBREG && MEM_P (SUBREG_REG (op)))))
     {
@@ -432,6 +433,7 @@ 
     return 0;
 
   if ((mode == QImode || mode == HImode)
+      && mode == GET_MODE (op)
       && (MEM_P (op)
 	  || (GET_CODE (op) == SUBREG && MEM_P (SUBREG_REG (op)))))
     {