[ARM] Enable armv8.5-a and add +sb and +predres for previous ARMv8-a in ARM

Message ID cbd8a797-704e-a805-7f7a-8fdb1bf01a3f@arm.com
State New
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  • [ARM] Enable armv8.5-a and add +sb and +predres for previous ARMv8-a in ARM
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Commit Message

Sudakshina Das Nov. 9, 2018, 3:33 p.m.
Hi

This patch adds -march=armv8.5-a to the Arm backend.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
Armv8.5-A also adds two new security features:
- Speculation Barrier instruction
- Execution and Data Prediction Restriction Instructions
These are made optional to all older Armv8-A versions. Thus we are
adding two new options "+sb" and "+predres" to all older Armv8-A. These
are passed on to the assembler and have no code generation effects and
have already gone in the trunk of binutils.

Bootstrapped and regression tested with arm-none-linux-gnueabihf.

Is this ok for trunk?
Sudi

*** gcc/ChangeLog ***

2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>

	* config/arm/arm-cpus.in (armv8_5, sb, predres): New features.
	(ARMv8_5a): New fgroup.
	(armv8.5-a): New arch.
	(armv8-a, armv8.1-a, armv8.2-a, armv8.3-a, armv8.4-a): New
	options sb and predres.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/t-aprofile: Add matching rules for -march=armv8.5-a
	* config/arm/t-arm-elf (all_v8_archs): Add armv8.5-a.
	* config/arm/t-multilib (v8_5_a_simd_variants): New variable.
	Add matching rules for -march=armv8.5-a and extensions.
	* doc/invoke.texi (ARM options): Document -march=armv8.5-a.
	Add sb and predres to all armv8-a except armv8.5-a.

*** gcc/testsuite/ChangeLog ***

2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>

	* gcc.target/arm/multilib.exp: Add some -march=armv8.5-a
	combination tests.

Comments

Kyrill Tkachov Nov. 9, 2018, 6:21 p.m. | #1
Hi Sudi,

On 09/11/18 15:33, Sudakshina Das wrote:
> Hi
>
> This patch adds -march=armv8.5-a to the Arm backend.
> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
> Armv8.5-A also adds two new security features:
> - Speculation Barrier instruction
> - Execution and Data Prediction Restriction Instructions
> These are made optional to all older Armv8-A versions. Thus we are
> adding two new options "+sb" and "+predres" to all older Armv8-A. These
> are passed on to the assembler and have no code generation effects and
> have already gone in the trunk of binutils.
>
> Bootstrapped and regression tested with arm-none-linux-gnueabihf.
>
> Is this ok for trunk?
> Sudi
>
> *** gcc/ChangeLog ***
>
> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
>
> 	* config/arm/arm-cpus.in (armv8_5, sb, predres): New features.
> 	(ARMv8_5a): New fgroup.
> 	(armv8.5-a): New arch.
> 	(armv8-a, armv8.1-a, armv8.2-a, armv8.3-a, armv8.4-a): New
> 	options sb and predres.
> 	* config/arm/arm-tables.opt: Regenerate.
> 	* config/arm/t-aprofile: Add matching rules for -march=armv8.5-a
> 	* config/arm/t-arm-elf (all_v8_archs): Add armv8.5-a.
> 	* config/arm/t-multilib (v8_5_a_simd_variants): New variable.
> 	Add matching rules for -march=armv8.5-a and extensions.
> 	* doc/invoke.texi (ARM options): Document -march=armv8.5-a.
> 	Add sb and predres to all armv8-a except armv8.5-a.
>
> *** gcc/testsuite/ChangeLog ***
>
> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
>
> 	* gcc.target/arm/multilib.exp: Add some -march=armv8.5-a
> 	combination tests.

Hi

This patch adds -march=armv8.5-a to the Arm backend.
(https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools)
Armv8.5-A also adds two new security features:
- Speculation Barrier instruction
- Execution and Data Prediction Restriction Instructions
These are made optional to all older Armv8-A versions. Thus we are
adding two new options "+sb" and "+predres" to all older Armv8-A. These
are passed on to the assembler and have no code generation effects and
have already gone in the trunk of binutils.

Bootstrapped and regression tested with arm-none-linux-gnueabihf.

Is this ok for trunk?
Sudi

*** gcc/ChangeLog ***

2018-xx-xx  Sudakshina Das<sudi.das@arm.com>

	* config/arm/arm-cpus.in (armv8_5, sb, predres): New features.
	(ARMv8_5a): New fgroup.
	(armv8.5-a): New arch.
	(armv8-a, armv8.1-a, armv8.2-a, armv8.3-a, armv8.4-a): New
	options sb and predres.
	* config/arm/arm-tables.opt: Regenerate.
	* config/arm/t-aprofile: Add matching rules for -march=armv8.5-a
	* config/arm/t-arm-elf (all_v8_archs): Add armv8.5-a.
	* config/arm/t-multilib (v8_5_a_simd_variants): New variable.
	Add matching rules for -march=armv8.5-a and extensions.
	* doc/invoke.texi (ARM options): Document -march=armv8.5-a.
	Add sb and predres to all armv8-a except armv8.5-a.

*** gcc/testsuite/ChangeLog ***

2018-xx-xx  Sudakshina Das<sudi.das@arm.com>

	* gcc.target/arm/multilib.exp: Add some -march=armv8.5-a
	combination tests.



This is ok modulo a typo fix below.

Thanks,
Kyrill

<snip>

index 25788ad09851daf41038b1578307bf23b7f34a94..eba038f9d20bc54bef7bdb7fa1c0e7028d954ed7 100644
--- a/gcc/config/arm/t-multilib
+++ b/gcc/config/arm/t-multilib
@@ -70,7 +70,8 @@ v8_a_simd_variants	:= $(call all_feat_combs, simd crypto)
  v8_1_a_simd_variants	:= $(call all_feat_combs, simd crypto)
  v8_2_a_simd_variants	:= $(call all_feat_combs, simd fp16 fp16fml crypto dotprod)
  v8_4_a_simd_variants	:= $(call all_feat_combs, simd fp16 crypto)
-v8_r_nosimd_variants	:= +crc
+v8_5_a_simd_variants	:= $(call all_feat_combs, simd fp16 crypto)
+v8_r_nosimd_variants	:= +cr5
  

Typo, should be +crc
Sudakshina Das Nov. 12, 2018, 3 p.m. | #2
Hi Kyrill

On 09/11/18 18:21, Kyrill Tkachov wrote:
> Hi Sudi,
> 
> On 09/11/18 15:33, Sudakshina Das wrote:
>> Hi
>>
>> This patch adds -march=armv8.5-a to the Arm backend.
>> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) 
>>
>> Armv8.5-A also adds two new security features:
>> - Speculation Barrier instruction
>> - Execution and Data Prediction Restriction Instructions
>> These are made optional to all older Armv8-A versions. Thus we are
>> adding two new options "+sb" and "+predres" to all older Armv8-A. These
>> are passed on to the assembler and have no code generation effects and
>> have already gone in the trunk of binutils.
>>
>> Bootstrapped and regression tested with arm-none-linux-gnueabihf.
>>
>> Is this ok for trunk?
>> Sudi
>>
>> *** gcc/ChangeLog ***
>>
>> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
>>
>>     * config/arm/arm-cpus.in (armv8_5, sb, predres): New features.
>>     (ARMv8_5a): New fgroup.
>>     (armv8.5-a): New arch.
>>     (armv8-a, armv8.1-a, armv8.2-a, armv8.3-a, armv8.4-a): New
>>     options sb and predres.
>>     * config/arm/arm-tables.opt: Regenerate.
>>     * config/arm/t-aprofile: Add matching rules for -march=armv8.5-a
>>     * config/arm/t-arm-elf (all_v8_archs): Add armv8.5-a.
>>     * config/arm/t-multilib (v8_5_a_simd_variants): New variable.
>>     Add matching rules for -march=armv8.5-a and extensions.
>>     * doc/invoke.texi (ARM options): Document -march=armv8.5-a.
>>     Add sb and predres to all armv8-a except armv8.5-a.
>>
>> *** gcc/testsuite/ChangeLog ***
>>
>> 2018-xx-xx  Sudakshina Das  <sudi.das@arm.com>
>>
>>     * gcc.target/arm/multilib.exp: Add some -march=armv8.5-a
>>     combination tests.
> 
> Hi
> 
> This patch adds -march=armv8.5-a to the Arm backend.
> (https://developer.arm.com/products/architecture/cpu-architecture/a-profile/exploration-tools) 
> 
> Armv8.5-A also adds two new security features:
> - Speculation Barrier instruction
> - Execution and Data Prediction Restriction Instructions
> These are made optional to all older Armv8-A versions. Thus we are
> adding two new options "+sb" and "+predres" to all older Armv8-A. These
> are passed on to the assembler and have no code generation effects and
> have already gone in the trunk of binutils.
> 
> Bootstrapped and regression tested with arm-none-linux-gnueabihf.
> 
> Is this ok for trunk?
> Sudi
> 
> *** gcc/ChangeLog ***
> 
> 2018-xx-xx  Sudakshina Das<sudi.das@arm.com>
> 
>      * config/arm/arm-cpus.in (armv8_5, sb, predres): New features.
>      (ARMv8_5a): New fgroup.
>      (armv8.5-a): New arch.
>      (armv8-a, armv8.1-a, armv8.2-a, armv8.3-a, armv8.4-a): New
>      options sb and predres.
>      * config/arm/arm-tables.opt: Regenerate.
>      * config/arm/t-aprofile: Add matching rules for -march=armv8.5-a
>      * config/arm/t-arm-elf (all_v8_archs): Add armv8.5-a.
>      * config/arm/t-multilib (v8_5_a_simd_variants): New variable.
>      Add matching rules for -march=armv8.5-a and extensions.
>      * doc/invoke.texi (ARM options): Document -march=armv8.5-a.
>      Add sb and predres to all armv8-a except armv8.5-a.
> 
> *** gcc/testsuite/ChangeLog ***
> 
> 2018-xx-xx  Sudakshina Das<sudi.das@arm.com>
> 
>      * gcc.target/arm/multilib.exp: Add some -march=armv8.5-a
>      combination tests.
> 
> 
> 
> This is ok modulo a typo fix below.
> 
> Thanks,
> Kyrill
> 

Thanks. Fixed and committed as r266031.

Sudi

> <snip>
> 
> index 
> 25788ad09851daf41038b1578307bf23b7f34a94..eba038f9d20bc54bef7bdb7fa1c0e7028d954ed7 
> 100644
> --- a/gcc/config/arm/t-multilib
> +++ b/gcc/config/arm/t-multilib
> @@ -70,7 +70,8 @@ v8_a_simd_variants    := $(call all_feat_combs, simd 
> crypto)
>   v8_1_a_simd_variants    := $(call all_feat_combs, simd crypto)
>   v8_2_a_simd_variants    := $(call all_feat_combs, simd fp16 fp16fml 
> crypto dotprod)
>   v8_4_a_simd_variants    := $(call all_feat_combs, simd fp16 crypto)
> -v8_r_nosimd_variants    := +crc
> +v8_5_a_simd_variants    := $(call all_feat_combs, simd fp16 crypto)
> +v8_r_nosimd_variants    := +cr5
> 
> 
> Typo, should be +crc
> 
> 
>

Patch

diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in
index d82e95a226659948e59b317f07e0fd386ed674a2..e6bcc3c720b64f4c80d9bff101e756de82d760e6 100644
--- a/gcc/config/arm/arm-cpus.in
+++ b/gcc/config/arm/arm-cpus.in
@@ -114,6 +114,9 @@  define feature armv8_3
 # Architecture rel 8.4.
 define feature armv8_4
 
+# Architecture rel 8.5.
+define feature armv8_5
+
 # M-Profile security extensions.
 define feature cmse
 
@@ -174,6 +177,14 @@  define feature quirk_cm3_ldrd
 # (Very) slow multiply operations.  Should probably be a tuning bit.
 define feature smallmul
 
+# Speculation Barrier Instruction for v8-A architectures, added by
+# default to v8.5-A
+define feature sb
+
+# Execution and Data Prediction Restriction Instruction for
+# v8-A architectures, added by default from v8.5-A
+define feature predres
+
 # Feature groups.  Conventionally all (or mostly) upper case.
 # ALL_FPU lists all the feature bits associated with the floating-point
 # unit; these will all be removed if the floating-point unit is disabled
@@ -235,6 +246,7 @@  define fgroup ARMv8_1a    ARMv8a crc32 armv8_1
 define fgroup ARMv8_2a    ARMv8_1a armv8_2
 define fgroup ARMv8_3a    ARMv8_2a armv8_3
 define fgroup ARMv8_4a    ARMv8_3a armv8_4
+define fgroup ARMv8_5a    ARMv8_4a armv8_5 sb predres
 define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv
 define fgroup ARMv8m_main ARMv7m armv8 cmse
 define fgroup ARMv8r      ARMv8a
@@ -505,6 +517,8 @@  begin arch armv8-a
  option crypto add FP_ARMv8 CRYPTO
  option nocrypto remove ALL_CRYPTO
  option nofp remove ALL_FP
+ option sb add sb
+ option predres add predres
 end arch armv8-a
 
 begin arch armv8.1-a
@@ -517,6 +531,8 @@  begin arch armv8.1-a
  option crypto add FP_ARMv8 CRYPTO
  option nocrypto remove ALL_CRYPTO
  option nofp remove ALL_FP
+ option sb add sb
+ option predres add predres
 end arch armv8.1-a
 
 begin arch armv8.2-a
@@ -532,6 +548,8 @@  begin arch armv8.2-a
  option nocrypto remove ALL_CRYPTO
  option nofp remove ALL_FP
  option dotprod add FP_ARMv8 DOTPROD
+ option sb add sb
+ option predres add predres
 end arch armv8.2-a
 
 begin arch armv8.3-a
@@ -547,6 +565,8 @@  begin arch armv8.3-a
  option nocrypto remove ALL_CRYPTO
  option nofp remove ALL_FP
  option dotprod add FP_ARMv8 DOTPROD
+ option sb add sb
+ option predres add predres
 end arch armv8.3-a
 
 begin arch armv8.4-a
@@ -560,8 +580,23 @@  begin arch armv8.4-a
  option crypto add FP_ARMv8 CRYPTO DOTPROD
  option nocrypto remove ALL_CRYPTO
  option nofp remove ALL_FP
+ option sb add sb
+ option predres add predres
 end arch armv8.4-a
 
+begin arch armv8.5-a
+ tune for cortex-a53
+ tune flags CO_PROC
+ base 8A
+ profile A
+ isa ARMv8_5a
+ option simd add FP_ARMv8 DOTPROD
+ option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD
+ option crypto add FP_ARMv8 CRYPTO DOTPROD
+ option nocrypto remove ALL_CRYPTO
+ option nofp remove ALL_FP
+end arch armv8.5-a
+
 begin arch armv8-m.base
  tune for cortex-m23
  base 8M_BASE
diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt
index eacee746a39912d04aa03c636f9a95e0e72ce43b..dde6e137db5598d92df6a1e69a63140146bf7372 100644
--- a/gcc/config/arm/arm-tables.opt
+++ b/gcc/config/arm/arm-tables.opt
@@ -377,19 +377,22 @@  EnumValue
 Enum(arm_arch) String(armv8.4-a) Value(24)
 
 EnumValue
-Enum(arm_arch) String(armv8-m.base) Value(25)
+Enum(arm_arch) String(armv8.5-a) Value(25)
 
 EnumValue
-Enum(arm_arch) String(armv8-m.main) Value(26)
+Enum(arm_arch) String(armv8-m.base) Value(26)
 
 EnumValue
-Enum(arm_arch) String(armv8-r) Value(27)
+Enum(arm_arch) String(armv8-m.main) Value(27)
 
 EnumValue
-Enum(arm_arch) String(iwmmxt) Value(28)
+Enum(arm_arch) String(armv8-r) Value(28)
 
 EnumValue
-Enum(arm_arch) String(iwmmxt2) Value(29)
+Enum(arm_arch) String(iwmmxt) Value(29)
+
+EnumValue
+Enum(arm_arch) String(iwmmxt2) Value(30)
 
 Enum
 Name(arm_fpu) Type(enum fpu_type)
diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile
index 7b55599d42947fea880483bf0a7a62f33bb1a1fb..945a938b4fed1283290224e836782fbb3069e9d9 100644
--- a/gcc/config/arm/t-aprofile
+++ b/gcc/config/arm/t-aprofile
@@ -103,6 +103,13 @@  MULTILIB_MATCHES	+= march?armv8-a=march?armv8.4-a
 MULTILIB_MATCHES	+= $(foreach ARCH, $(v8_4_a_simd_variants), \
 			     march?armv8-a+simd=march?armv8.4-a$(ARCH))
 
+# Baseline v8.5-a: map down to baseline v8-a
+MULTILIB_MATCHES	+= march?armv8-a=march?armv8.5-a
+
+# Map all v8.5-a SIMD variants to v8-a+simd
+MULTILIB_MATCHES	+= $(foreach ARCH, $(v8_5_a_simd_variants), \
+			     march?armv8-a+simd=march?armv8.5-a$(ARCH))
+
 # Use Thumb libraries for everything.
 
 MULTILIB_REUSE		+= mthumb/march.armv7-a/mfloat-abi.soft=marm/march.armv7-a/mfloat-abi.soft
diff --git a/gcc/config/arm/t-arm-elf b/gcc/config/arm/t-arm-elf
index 3506b16e929fa30af90e0a1bf20653ed6a098eaa..d8853aa8f5afcccb0e4f4187c44de01a23b89402 100644
--- a/gcc/config/arm/t-arm-elf
+++ b/gcc/config/arm/t-arm-elf
@@ -46,7 +46,8 @@  all_early_arch	:= armv5tej armv6 armv6j armv6k armv6z armv6kz \
 
 all_v7_a_r	:= armv7-a armv7ve armv7-r
 
-all_v8_archs	:= armv8-a armv8-a+crc armv8.1-a armv8.2-a armv8.3-a armv8.4-a
+all_v8_archs	:= armv8-a armv8-a+crc armv8.1-a armv8.2-a armv8.3-a armv8.4-a \
+		   armv8.5-a
 
 # No floating point variants, require thumb1 softfp
 all_nofp_t	:= armv6-m armv6s-m armv8-m.base
diff --git a/gcc/config/arm/t-multilib b/gcc/config/arm/t-multilib
index 25788ad09851daf41038b1578307bf23b7f34a94..eba038f9d20bc54bef7bdb7fa1c0e7028d954ed7 100644
--- a/gcc/config/arm/t-multilib
+++ b/gcc/config/arm/t-multilib
@@ -70,7 +70,8 @@  v8_a_simd_variants	:= $(call all_feat_combs, simd crypto)
 v8_1_a_simd_variants	:= $(call all_feat_combs, simd crypto)
 v8_2_a_simd_variants	:= $(call all_feat_combs, simd fp16 fp16fml crypto dotprod)
 v8_4_a_simd_variants	:= $(call all_feat_combs, simd fp16 crypto)
-v8_r_nosimd_variants	:= +crc
+v8_5_a_simd_variants	:= $(call all_feat_combs, simd fp16 crypto)
+v8_r_nosimd_variants	:= +cr5
 
 ifneq (,$(HAS_APROFILE))
 include $(srcdir)/config/arm/t-aprofile
@@ -163,6 +164,13 @@  MULTILIB_MATCHES	+= march?armv7=march?armv8.4-a
 MULTILIB_MATCHES	+= $(foreach ARCH, $(v8_4_a_simd_variants), \
 			     march?armv7+fp=march?armv8.4-a$(ARCH))
 
+# Baseline v8.5-a: map down to baseline v8-a
+MULTILIB_MATCHES	+= march?armv7=march?armv8.5-a
+
+# Map all v8.5-a SIMD variants
+MULTILIB_MATCHES	+= $(foreach ARCH, $(v8_5_a_simd_variants), \
+			     march?armv7+fp=march?armv8.5-a$(ARCH))
+
 # Use Thumb libraries for everything.
 
 MULTILIB_REUSE		+= mthumb/march.armv7/mfloat-abi.soft=marm/march.armv7/mfloat-abi.soft
@@ -176,4 +184,4 @@  MULTILIB_REUSE		+= $(foreach MODE, arm thumb, \
 			     $(foreach ARCH, armv7, \
 			       mthumb/march.$(ARCH)/mfloat-abi.soft=m$(MODE)/march.$(ARCH)/mfloat-abi.softfp))
 
-endif		# Not APROFILE.
\ No newline at end of file
+endif		# Not APROFILE.
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index 9e322b79a9f3405bac6b3a3c4b6cb15a61bef7a3..df9f00e054db795bc5478a2ac9ebbdc4bf82b73a 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -16388,6 +16388,7 @@  Permissible names are:
 @samp{armv7}, @samp{armv7-a}, @samp{armv7ve}, 
 @samp{armv8-a}, @samp{armv8.1-a}, @samp{armv8.2-a}, @samp{armv8.3-a},
 @samp{armv8.4-a},
+@samp{armv8.5-a},
 @samp{armv7-r},
 @samp{armv8-r},
 @samp{armv6-m}, @samp{armv6s-m},
@@ -16564,6 +16565,10 @@  The cryptographic instructions.
 Disable the cryptographic instructions.
 @item +nofp
 Disable the floating-point, Advanced SIMD and cryptographic instructions.
+@item +sb
+Speculation Barrier Instruction.
+@item +predres
+Execution and Data Prediction Restriction Instructions.
 @end table
 
 @item armv8.1-a
@@ -16580,6 +16585,12 @@  Disable the cryptographic instructions.
 
 @item +nofp
 Disable the floating-point, Advanced SIMD and cryptographic instructions.
+
+@item +sb
+Speculation Barrier Instruction.
+
+@item +predres
+Execution and Data Prediction Restriction Instructions.
 @end table
 
 @item armv8.2-a
@@ -16609,6 +16620,12 @@  Disable the cryptographic extension.
 
 @item +nofp
 Disable the floating-point, Advanced SIMD and cryptographic instructions.
+
+@item +sb
+Speculation Barrier Instruction.
+
+@item +predres
+Execution and Data Prediction Restriction Instructions.
 @end table
 
 @item armv8.4-a
@@ -16632,6 +16649,35 @@  Disable the cryptographic extension.
 
 @item +nofp
 Disable the floating-point, Advanced SIMD and cryptographic instructions.
+
+@item +sb
+Speculation Barrier Instruction.
+
+@item +predres
+Execution and Data Prediction Restriction Instructions.
+@end table
+
+@item armv8.5-a
+@table @samp
+@item +fp16
+The half-precision floating-point data processing instructions.
+This also enables the Advanced SIMD and floating-point instructions as well
+as the Dot Product extension and the half-precision floating-point fmla
+extension.
+
+@item +simd
+The ARMv8.3-A Advanced SIMD and floating-point instructions as well as the
+Dot Product extension.
+
+@item +crypto
+The cryptographic instructions.  This also enables the Advanced SIMD and
+floating-point instructions as well as the Dot Product extension.
+
+@item +nocrypto
+Disable the cryptographic extension.
+
+@item +nofp
+Disable the floating-point, Advanced SIMD and cryptographic instructions.
 @end table
 
 @item armv7-r
diff --git a/gcc/testsuite/gcc.target/arm/multilib.exp b/gcc/testsuite/gcc.target/arm/multilib.exp
index 04da2b0a20eda299c5749e8702ac1c5a8c937900..cdd06f8265f9b1ac76d4aae9be003c519682eee6 100644
--- a/gcc/testsuite/gcc.target/arm/multilib.exp
+++ b/gcc/testsuite/gcc.target/arm/multilib.exp
@@ -108,6 +108,14 @@  if {[multilib_config "aprofile"] } {
 	{-march=armv8.4-a+simd+fp16 -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
 	{-march=armv8.4-a+simd+fp16+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
 	{-march=armv8.4-a+simd+nofp+fp16 -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
+	{-march=armv8.5-a+crypto -mfloat-abi=soft} "thumb/v8-a/nofp"
+	{-march=armv8.5-a+simd+crypto -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
+	{-march=armv8.5-a+simd+crypto+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
+	{-march=armv8.5-a+simd+nofp+crypto -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
+	{-march=armv8.5-a+fp16 -mfloat-abi=soft} "thumb/v8-a/nofp"
+	{-march=armv8.5-a+simd+fp16 -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
+	{-march=armv8.5-a+simd+fp16+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
+	{-march=armv8.5-a+simd+nofp+fp16 -mfloat-abi=softfp} "thumb/v8-a+simd/softfp"
 	{-mcpu=cortex-a53+crypto -mfloat-abi=hard} "thumb/v8-a+simd/hard"
 	{-mcpu=cortex-a53+nofp -mfloat-abi=softfp} "thumb/v8-a/nofp"
 	{-march=armv8-a+crc -mfloat-abi=hard -mfpu=vfp} "thumb/v8-a+simd/hard"