| Message ID | 1307559785-11007-1-git-send-email-timur@freescale.com (mailing list archive) |
|---|---|
| State | Accepted, archived |
| Delegated to: | Kumar Gala |
| Headers | show |
On Jun 8, 2011, at 2:03 PM, Timur Tabi wrote: > On the Freescale P1022DS reference board, the SSI audio controller is > connected in "asynchronous" mode to the codec's clocks, so the device tree > needs an "fsl,ssi-asynchronous" property. > > Also remove the clock-frequency property from the wm8776 node, because > the clock is enabled only if U-Boot enables it, and U-Boot will set the > property if the clock is enabled. A future version of the P1022DS audio > driver will configure the clock itself, but for now, the driver should > not be told that the clock is running when it isn't. > > Also fix the FIFO depth to 15, instead of 16. > > Signed-off-by: Timur Tabi <timur@freescale.com> > --- > arch/powerpc/boot/dts/p1022ds.dts | 9 ++++++--- > 1 files changed, 6 insertions(+), 3 deletions(-) applied to merge - k
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts index 4f685a7..98d9426 100644 --- a/arch/powerpc/boot/dts/p1022ds.dts +++ b/arch/powerpc/boot/dts/p1022ds.dts @@ -209,8 +209,10 @@ wm8776:codec@1a { compatible = "wlf,wm8776"; reg = <0x1a>; - /* MCLK source is a stand-alone oscillator */ - clock-frequency = <12288000>; + /* + * clock-frequency will be set by U-Boot if + * the clock is enabled. + */ }; }; @@ -280,7 +282,8 @@ codec-handle = <&wm8776>; fsl,playback-dma = <&dma00>; fsl,capture-dma = <&dma01>; - fsl,fifo-depth = <16>; + fsl,fifo-depth = <15>; + fsl,ssi-asynchronous; }; dma@c300 {
On the Freescale P1022DS reference board, the SSI audio controller is connected in "asynchronous" mode to the codec's clocks, so the device tree needs an "fsl,ssi-asynchronous" property. Also remove the clock-frequency property from the wm8776 node, because the clock is enabled only if U-Boot enables it, and U-Boot will set the property if the clock is enabled. A future version of the P1022DS audio driver will configure the clock itself, but for now, the driver should not be told that the clock is running when it isn't. Also fix the FIFO depth to 15, instead of 16. Signed-off-by: Timur Tabi <timur@freescale.com> --- arch/powerpc/boot/dts/p1022ds.dts | 9 ++++++--- 1 files changed, 6 insertions(+), 3 deletions(-)