From patchwork Fri Nov 9 03:15:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Dmitry V. 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Levin" To: Andy Lutomirski , Vineet Gupta Subject: [PATCH 02/13] elf-em.h: add EM_ARC Message-ID: <20181109031536.GB21511@altlinux.org> Mail-Followup-To: Andy Lutomirski , Vineet Gupta , Elvira Khabirova , linux-snps-arc@lists.infradead.org, linux-kernel@vger.kernel.org MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20181109031303.GA20906@altlinux.org> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20181108_221552_906699_39A0274F X-CRM114-Status: UNSURE ( 9.46 ) X-CRM114-Notice: Please train this message. X-Spam-Score: -0.0 (/) X-Spam-Report: SpamAssassin version 3.4.2 on merlin.infradead.org summary: Content analysis details: (-0.0 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record X-BeenThere: linux-snps-arc@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: Linux on Synopsys ARC Processors List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linux-snps-arc@lists.infradead.org, Elvira Khabirova , linux-kernel@vger.kernel.org Sender: "linux-snps-arc" Errors-To: linux-snps-arc-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org The uapi/linux/audit.h header is going to use EM_ARC in order to define AUDIT_ARCH_ARC which is needed to implement syscall_get_arch() which in turn is required to extend the generic ptrace API with PTRACE_GET_SYSCALL_INFO request. The value for EM_ARC has been taken from http://www.sco.com/developers/gabi/2012-12-31/ch4.eheader.html Signed-off-by: Dmitry V. Levin --- include/uapi/linux/elf-em.h | 1 + 1 file changed, 1 insertion(+) diff --git a/include/uapi/linux/elf-em.h b/include/uapi/linux/elf-em.h index ba3696e3d694..56ff3f9d9633 100644 --- a/include/uapi/linux/elf-em.h +++ b/include/uapi/linux/elf-em.h @@ -26,6 +26,7 @@ #define EM_ARM 40 /* ARM 32 bit */ #define EM_SH 42 /* SuperH */ #define EM_SPARCV9 43 /* SPARC v9 64-bit */ +#define EM_ARC 45 /* Argonaut RISC Core */ #define EM_H8_300 46 /* Renesas H8/300 */ #define EM_IA_64 50 /* HP/Intel IA-64 */ #define EM_X86_64 62 /* AMD x86-64 */