Patchwork [v2,8/9] msix: Align MSI-X constants to libpci definitions and extend them

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Submitter Jan Kiszka
Date June 8, 2011, 4:21 p.m.
Message ID <219d3206ad6eafed76d4f108a40912fe72884e19.1307550106.git.jan.kiszka@siemens.com>
Download mbox | patch
Permalink /patch/99508/
State New
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Comments

Jan Kiszka - June 8, 2011, 4:21 p.m.
Add PCI_MSIX_TABLE and PCI_MSIX_PBA, align other MSIX related constant
names to libpci style. Will be used for device assignment code in
qemu-kvm.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
---
 hw/msix.c     |   24 +++++++++++-------------
 hw/pci_regs.h |   14 ++++++++------
 2 files changed, 19 insertions(+), 19 deletions(-)
Michael S. Tsirkin - June 8, 2011, 7:46 p.m.
On Wed, Jun 08, 2011 at 06:21:51PM +0200, Jan Kiszka wrote:
> Add PCI_MSIX_TABLE and PCI_MSIX_PBA, align other MSIX related constant
> names to libpci style. Will be used for device assignment code in
> qemu-kvm.
> 
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> ---
>  hw/msix.c     |   24 +++++++++++-------------
>  hw/pci_regs.h |   14 ++++++++------
>  2 files changed, 19 insertions(+), 19 deletions(-)
> 
> diff --git a/hw/msix.c b/hw/msix.c
> index 600f5fb..b20cf7c 100644
> --- a/hw/msix.c
> +++ b/hw/msix.c
> @@ -16,15 +16,12 @@
>  #include "pci.h"
>  #include "range.h"
>  
> -/* MSI-X capability structure */
> -#define MSIX_TABLE_OFFSET 4
> -#define MSIX_PBA_OFFSET 8
>  #define MSIX_CAP_LENGTH 12
>  
> -/* MSI enable bit and maskall bit are in byte 1 in FLAGS register */
> -#define MSIX_CONTROL_OFFSET (PCI_MSIX_FLAGS + 1)
> -#define MSIX_ENABLE_MASK (PCI_MSIX_FLAGS_ENABLE >> 8)
> -#define MSIX_MASKALL_MASK (PCI_MSIX_FLAGS_MASKALL >> 8)
> +/* MSI enable bit and maskall bit are in byte 1 in control register */
> +#define MSIX_CONTROL_OFFSET (PCI_MSIX_CTRL + 1)
> +#define MSIX_ENABLE_MASK (PCI_MSIX_ENABLE >> 8)
> +#define MSIX_MASKALL_MASK (PCI_MSIX_MASK >> 8)
>  
>  /* MSI-X table format */
>  #define MSIX_MSG_ADDR 0
> @@ -58,8 +55,9 @@ static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
>      uint8_t *config;
>      uint32_t new_size;
>  
> -    if (nentries < 1 || nentries > PCI_MSIX_FLAGS_QSIZE + 1)
> +    if (nentries < 1 || nentries > PCI_MSIX_TABSIZE + 1) {
>          return -EINVAL;
> +    }
>      if (bar_size > 0x80000000)
>          return -ENOSPC;
>  
> @@ -80,11 +78,11 @@ static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
>          return config_offset;
>      config = pdev->config + config_offset;
>  
> -    pci_set_word(config + PCI_MSIX_FLAGS, nentries - 1);
> +    pci_set_word(config + PCI_MSIX_CTRL, nentries - 1);
>      /* Table on top of BAR */
> -    pci_set_long(config + MSIX_TABLE_OFFSET, bar_size | bar_nr);
> +    pci_set_long(config + PCI_MSIX_TABLE, bar_size | bar_nr);
>      /* Pending bits on top of that */
> -    pci_set_long(config + MSIX_PBA_OFFSET, (bar_size + MSIX_PAGE_PENDING) |
> +    pci_set_long(config + PCI_MSIX_PBA, (bar_size + MSIX_PAGE_PENDING) |
>                   bar_nr);
>      pdev->msix_cap = config_offset;
>      /* Make flags bit writable. */
> @@ -208,11 +206,11 @@ void msix_mmio_map(PCIDevice *d, int region_num,
>                     pcibus_t addr, pcibus_t size, int type)
>  {
>      uint8_t *config = d->config + d->msix_cap;
> -    uint32_t table = pci_get_long(config + MSIX_TABLE_OFFSET);
> +    uint32_t table = pci_get_long(config + PCI_MSIX_TABLE);
>      uint32_t offset = table & ~(MSIX_PAGE_SIZE - 1);
>      /* TODO: for assigned devices, we'll want to make it possible to map
>       * pending bits separately in case they are in a separate bar. */
> -    int table_bir = table & PCI_MSIX_FLAGS_BIRMASK;
> +    int table_bir = table & PCI_MSIX_BIR;
>  
>      if (table_bir != region_num)
>          return;
> diff --git a/hw/pci_regs.h b/hw/pci_regs.h
> index 5a5ab89..c17c22f 100644
> --- a/hw/pci_regs.h
> +++ b/hw/pci_regs.h
> @@ -300,12 +300,14 @@
>  #define PCI_MSI_DATA_64		12	/* 16 bits of data for 64-bit devices */
>  #define PCI_MSI_MASK_64		16	/* Mask bits register for 64-bit devices */
>  
> -/* MSI-X registers (these are at offset PCI_MSIX_FLAGS) */
> -#define PCI_MSIX_FLAGS		2
> -#define  PCI_MSIX_FLAGS_QSIZE	0x7FF
> -#define  PCI_MSIX_FLAGS_ENABLE	(1 << 15)
> -#define  PCI_MSIX_FLAGS_MASKALL	(1 << 14)
> -#define PCI_MSIX_FLAGS_BIRMASK	(7 << 0)
> +/* MSI-X registers */
> +#define PCI_MSIX_CTRL           2       /* Message control */
> +#define  PCI_MSIX_TABSIZE       0x7FF   /* Table size - 1 */
> +#define  PCI_MSIX_MASK          0x4000  /* Mask all vectors */
> +#define  PCI_MSIX_ENABLE        0x8000  /* Enable MSI-X */
> +#define PCI_MSIX_TABLE          4       /* MSI-X table */
> +#define PCI_MSIX_PBA            8       /* Pending bit array */
> +#define  PCI_MSIX_BIR           0x7     /* BAR indication register */
>  
>  /* CompactPCI Hotswap Register */

We are using pci_regs.h from Linux, not libpci, as the base.
What I see there is:

#define PCI_MSIX_FLAGS          2
#define  PCI_MSIX_FLAGS_QSIZE   0x7FF
#define  PCI_MSIX_FLAGS_ENABLE  (1 << 15)
#define  PCI_MSIX_FLAGS_MASKALL (1 << 14)
#define PCI_MSIX_TABLE          4
#define PCI_MSIX_PBA            8
#define  PCI_MSIX_FLAGS_BIRMASK (7 << 0)
#define PCI_MSIX_ENTRY_SIZE             16
#define  PCI_MSIX_ENTRY_LOWER_ADDR      0
#define  PCI_MSIX_ENTRY_UPPER_ADDR      4
#define  PCI_MSIX_ENTRY_DATA            8
#define  PCI_MSIX_ENTRY_VECTOR_CTRL     12
#define   PCI_MSIX_ENTRY_CTRL_MASKBIT   1


Let's stick to that please.

>  
> -- 
> 1.7.1
Michael S. Tsirkin - June 8, 2011, 7:53 p.m.
On Wed, Jun 08, 2011 at 06:21:51PM +0200, Jan Kiszka wrote:
> Add PCI_MSIX_TABLE and PCI_MSIX_PBA, align other MSIX related constant
> names to libpci style. Will be used for device assignment code in
> qemu-kvm.
> 
> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>

Besides keeping pci_regs.h aligned with the original,
I also think ideally pci register banging should stay
within the pci subsystem.

Could we add high-level APIs to help with that,
instead of having kvm look at config space directly?


> ---
>  hw/msix.c     |   24 +++++++++++-------------
>  hw/pci_regs.h |   14 ++++++++------
>  2 files changed, 19 insertions(+), 19 deletions(-)
> 
> diff --git a/hw/msix.c b/hw/msix.c
> index 600f5fb..b20cf7c 100644
> --- a/hw/msix.c
> +++ b/hw/msix.c
> @@ -16,15 +16,12 @@
>  #include "pci.h"
>  #include "range.h"
>  
> -/* MSI-X capability structure */
> -#define MSIX_TABLE_OFFSET 4
> -#define MSIX_PBA_OFFSET 8
>  #define MSIX_CAP_LENGTH 12
>  
> -/* MSI enable bit and maskall bit are in byte 1 in FLAGS register */
> -#define MSIX_CONTROL_OFFSET (PCI_MSIX_FLAGS + 1)
> -#define MSIX_ENABLE_MASK (PCI_MSIX_FLAGS_ENABLE >> 8)
> -#define MSIX_MASKALL_MASK (PCI_MSIX_FLAGS_MASKALL >> 8)
> +/* MSI enable bit and maskall bit are in byte 1 in control register */
> +#define MSIX_CONTROL_OFFSET (PCI_MSIX_CTRL + 1)
> +#define MSIX_ENABLE_MASK (PCI_MSIX_ENABLE >> 8)
> +#define MSIX_MASKALL_MASK (PCI_MSIX_MASK >> 8)
>  
>  /* MSI-X table format */
>  #define MSIX_MSG_ADDR 0
> @@ -58,8 +55,9 @@ static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
>      uint8_t *config;
>      uint32_t new_size;
>  
> -    if (nentries < 1 || nentries > PCI_MSIX_FLAGS_QSIZE + 1)
> +    if (nentries < 1 || nentries > PCI_MSIX_TABSIZE + 1) {
>          return -EINVAL;
> +    }
>      if (bar_size > 0x80000000)
>          return -ENOSPC;
>  
> @@ -80,11 +78,11 @@ static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
>          return config_offset;
>      config = pdev->config + config_offset;
>  
> -    pci_set_word(config + PCI_MSIX_FLAGS, nentries - 1);
> +    pci_set_word(config + PCI_MSIX_CTRL, nentries - 1);
>      /* Table on top of BAR */
> -    pci_set_long(config + MSIX_TABLE_OFFSET, bar_size | bar_nr);
> +    pci_set_long(config + PCI_MSIX_TABLE, bar_size | bar_nr);
>      /* Pending bits on top of that */
> -    pci_set_long(config + MSIX_PBA_OFFSET, (bar_size + MSIX_PAGE_PENDING) |
> +    pci_set_long(config + PCI_MSIX_PBA, (bar_size + MSIX_PAGE_PENDING) |
>                   bar_nr);
>      pdev->msix_cap = config_offset;
>      /* Make flags bit writable. */
> @@ -208,11 +206,11 @@ void msix_mmio_map(PCIDevice *d, int region_num,
>                     pcibus_t addr, pcibus_t size, int type)
>  {
>      uint8_t *config = d->config + d->msix_cap;
> -    uint32_t table = pci_get_long(config + MSIX_TABLE_OFFSET);
> +    uint32_t table = pci_get_long(config + PCI_MSIX_TABLE);
>      uint32_t offset = table & ~(MSIX_PAGE_SIZE - 1);
>      /* TODO: for assigned devices, we'll want to make it possible to map
>       * pending bits separately in case they are in a separate bar. */
> -    int table_bir = table & PCI_MSIX_FLAGS_BIRMASK;
> +    int table_bir = table & PCI_MSIX_BIR;
>  
>      if (table_bir != region_num)
>          return;
> diff --git a/hw/pci_regs.h b/hw/pci_regs.h
> index 5a5ab89..c17c22f 100644
> --- a/hw/pci_regs.h
> +++ b/hw/pci_regs.h
> @@ -300,12 +300,14 @@
>  #define PCI_MSI_DATA_64		12	/* 16 bits of data for 64-bit devices */
>  #define PCI_MSI_MASK_64		16	/* Mask bits register for 64-bit devices */
>  
> -/* MSI-X registers (these are at offset PCI_MSIX_FLAGS) */
> -#define PCI_MSIX_FLAGS		2
> -#define  PCI_MSIX_FLAGS_QSIZE	0x7FF
> -#define  PCI_MSIX_FLAGS_ENABLE	(1 << 15)
> -#define  PCI_MSIX_FLAGS_MASKALL	(1 << 14)
> -#define PCI_MSIX_FLAGS_BIRMASK	(7 << 0)
> +/* MSI-X registers */
> +#define PCI_MSIX_CTRL           2       /* Message control */
> +#define  PCI_MSIX_TABSIZE       0x7FF   /* Table size - 1 */
> +#define  PCI_MSIX_MASK          0x4000  /* Mask all vectors */
> +#define  PCI_MSIX_ENABLE        0x8000  /* Enable MSI-X */
> +#define PCI_MSIX_TABLE          4       /* MSI-X table */
> +#define PCI_MSIX_PBA            8       /* Pending bit array */
> +#define  PCI_MSIX_BIR           0x7     /* BAR indication register */
>  
>  /* CompactPCI Hotswap Register */
>  
> -- 
> 1.7.1
Jan Kiszka - June 8, 2011, 8:48 p.m.
On 2011-06-08 21:53, Michael S. Tsirkin wrote:
> On Wed, Jun 08, 2011 at 06:21:51PM +0200, Jan Kiszka wrote:
>> Add PCI_MSIX_TABLE and PCI_MSIX_PBA, align other MSIX related constant
>> names to libpci style. Will be used for device assignment code in
>> qemu-kvm.
>>
>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> 
> Besides keeping pci_regs.h aligned with the original,
> I also think ideally pci register banging should stay
> within the pci subsystem.
> 
> Could we add high-level APIs to help with that,
> instead of having kvm look at config space directly?

We could move the related static inlines from msi/msix.c to the headers
in order to test for bits etc. Still, kvm needs to interpret the config
space of the assigned device, so the abstraction will remain rather low.

Jan
Michael S. Tsirkin - June 8, 2011, 9 p.m.
On Wed, Jun 08, 2011 at 10:48:10PM +0200, Jan Kiszka wrote:
> On 2011-06-08 21:53, Michael S. Tsirkin wrote:
> > On Wed, Jun 08, 2011 at 06:21:51PM +0200, Jan Kiszka wrote:
> >> Add PCI_MSIX_TABLE and PCI_MSIX_PBA, align other MSIX related constant
> >> names to libpci style. Will be used for device assignment code in
> >> qemu-kvm.
> >>
> >> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> > 
> > Besides keeping pci_regs.h aligned with the original,
> > I also think ideally pci register banging should stay
> > within the pci subsystem.
> > 
> > Could we add high-level APIs to help with that,
> > instead of having kvm look at config space directly?
> 
> We could move the related static inlines from msi/msix.c to the headers
> in order to test for bits etc. Still, kvm needs to interpret the config
> space of the assigned device, so the abstraction will remain rather low.
> 
> Jan
> 

Hmm, at least for MSI/MSIX I thought this is done by kvm in kernel?
Jan Kiszka - June 8, 2011, 9:02 p.m.
On 2011-06-08 23:00, Michael S. Tsirkin wrote:
> On Wed, Jun 08, 2011 at 10:48:10PM +0200, Jan Kiszka wrote:
>> On 2011-06-08 21:53, Michael S. Tsirkin wrote:
>>> On Wed, Jun 08, 2011 at 06:21:51PM +0200, Jan Kiszka wrote:
>>>> Add PCI_MSIX_TABLE and PCI_MSIX_PBA, align other MSIX related constant
>>>> names to libpci style. Will be used for device assignment code in
>>>> qemu-kvm.
>>>>
>>>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>>>
>>> Besides keeping pci_regs.h aligned with the original,
>>> I also think ideally pci register banging should stay
>>> within the pci subsystem.
>>>
>>> Could we add high-level APIs to help with that,
>>> instead of having kvm look at config space directly?
>>
>> We could move the related static inlines from msi/msix.c to the headers
>> in order to test for bits etc. Still, kvm needs to interpret the config
>> space of the assigned device, so the abstraction will remain rather low.
>>
>> Jan
>>
> 
> Hmm, at least for MSI/MSIX I thought this is done by kvm in kernel?
> 

At least for the "traditional" assignment interface (VFIO may offload
something), no. User space does the cap analysis, filtering, and in the
MSI/MSI-X case the translation to QEMU msi/msix services. The latter is
even WIP in my tree. Surrent assignment open-codes this, missing many
corner cases.

Jan
Michael S. Tsirkin - June 8, 2011, 9:09 p.m.
On Wed, Jun 08, 2011 at 11:02:44PM +0200, Jan Kiszka wrote:
> On 2011-06-08 23:00, Michael S. Tsirkin wrote:
> > On Wed, Jun 08, 2011 at 10:48:10PM +0200, Jan Kiszka wrote:
> >> On 2011-06-08 21:53, Michael S. Tsirkin wrote:
> >>> On Wed, Jun 08, 2011 at 06:21:51PM +0200, Jan Kiszka wrote:
> >>>> Add PCI_MSIX_TABLE and PCI_MSIX_PBA, align other MSIX related constant
> >>>> names to libpci style. Will be used for device assignment code in
> >>>> qemu-kvm.
> >>>>
> >>>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> >>>
> >>> Besides keeping pci_regs.h aligned with the original,
> >>> I also think ideally pci register banging should stay
> >>> within the pci subsystem.
> >>>
> >>> Could we add high-level APIs to help with that,
> >>> instead of having kvm look at config space directly?
> >>
> >> We could move the related static inlines from msi/msix.c to the headers
> >> in order to test for bits etc. Still, kvm needs to interpret the config
> >> space of the assigned device, so the abstraction will remain rather low.
> >>
> >> Jan
> >>
> > 
> > Hmm, at least for MSI/MSIX I thought this is done by kvm in kernel?
> > 
> 
> At least for the "traditional" assignment interface (VFIO may offload
> something), no. User space does the cap analysis, filtering, and in the
> MSI/MSI-X case the translation to QEMU msi/msix services. The latter is
> even WIP in my tree. Surrent assignment open-codes this, missing many
> corner cases.
> 
> Jan
> 

Anyway, if some defines need to be in a header, and aren't upstream
yet, let's create pci_ext_regs.h and add a comment there that we
should work on upstreaming them.
Jan Kiszka - June 8, 2011, 9:11 p.m.
On 2011-06-08 23:09, Michael S. Tsirkin wrote:
> On Wed, Jun 08, 2011 at 11:02:44PM +0200, Jan Kiszka wrote:
>> On 2011-06-08 23:00, Michael S. Tsirkin wrote:
>>> On Wed, Jun 08, 2011 at 10:48:10PM +0200, Jan Kiszka wrote:
>>>> On 2011-06-08 21:53, Michael S. Tsirkin wrote:
>>>>> On Wed, Jun 08, 2011 at 06:21:51PM +0200, Jan Kiszka wrote:
>>>>>> Add PCI_MSIX_TABLE and PCI_MSIX_PBA, align other MSIX related constant
>>>>>> names to libpci style. Will be used for device assignment code in
>>>>>> qemu-kvm.
>>>>>>
>>>>>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
>>>>>
>>>>> Besides keeping pci_regs.h aligned with the original,
>>>>> I also think ideally pci register banging should stay
>>>>> within the pci subsystem.
>>>>>
>>>>> Could we add high-level APIs to help with that,
>>>>> instead of having kvm look at config space directly?
>>>>
>>>> We could move the related static inlines from msi/msix.c to the headers
>>>> in order to test for bits etc. Still, kvm needs to interpret the config
>>>> space of the assigned device, so the abstraction will remain rather low.
>>>>
>>>> Jan
>>>>
>>>
>>> Hmm, at least for MSI/MSIX I thought this is done by kvm in kernel?
>>>
>>
>> At least for the "traditional" assignment interface (VFIO may offload
>> something), no. User space does the cap analysis, filtering, and in the
>> MSI/MSI-X case the translation to QEMU msi/msix services. The latter is
>> even WIP in my tree. Surrent assignment open-codes this, missing many
>> corner cases.
>>
>> Jan
>>
> 
> Anyway, if some defines need to be in a header, and aren't upstream
> yet, let's create pci_ext_regs.h and add a comment there that we
> should work on upstreaming them.

Sounds good. But what is supposed to be upstream for us, the kernel or
pci-utils/libpci?

Jan
Michael S. Tsirkin - June 8, 2011, 9:15 p.m.
On Wed, Jun 08, 2011 at 11:11:37PM +0200, Jan Kiszka wrote:
> On 2011-06-08 23:09, Michael S. Tsirkin wrote:
> > On Wed, Jun 08, 2011 at 11:02:44PM +0200, Jan Kiszka wrote:
> >> On 2011-06-08 23:00, Michael S. Tsirkin wrote:
> >>> On Wed, Jun 08, 2011 at 10:48:10PM +0200, Jan Kiszka wrote:
> >>>> On 2011-06-08 21:53, Michael S. Tsirkin wrote:
> >>>>> On Wed, Jun 08, 2011 at 06:21:51PM +0200, Jan Kiszka wrote:
> >>>>>> Add PCI_MSIX_TABLE and PCI_MSIX_PBA, align other MSIX related constant
> >>>>>> names to libpci style. Will be used for device assignment code in
> >>>>>> qemu-kvm.
> >>>>>>
> >>>>>> Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
> >>>>>
> >>>>> Besides keeping pci_regs.h aligned with the original,
> >>>>> I also think ideally pci register banging should stay
> >>>>> within the pci subsystem.
> >>>>>
> >>>>> Could we add high-level APIs to help with that,
> >>>>> instead of having kvm look at config space directly?
> >>>>
> >>>> We could move the related static inlines from msi/msix.c to the headers
> >>>> in order to test for bits etc. Still, kvm needs to interpret the config
> >>>> space of the assigned device, so the abstraction will remain rather low.
> >>>>
> >>>> Jan
> >>>>
> >>>
> >>> Hmm, at least for MSI/MSIX I thought this is done by kvm in kernel?
> >>>
> >>
> >> At least for the "traditional" assignment interface (VFIO may offload
> >> something), no. User space does the cap analysis, filtering, and in the
> >> MSI/MSI-X case the translation to QEMU msi/msix services. The latter is
> >> even WIP in my tree. Surrent assignment open-codes this, missing many
> >> corner cases.
> >>
> >> Jan
> >>
> > 
> > Anyway, if some defines need to be in a header, and aren't upstream
> > yet, let's create pci_ext_regs.h and add a comment there that we
> > should work on upstreaming them.
> 
> Sounds good. But what is supposed to be upstream for us, the kernel or
> pci-utils/libpci?
> 
> Jan
> 

It's currently the kernel, I don't really see a reason to change that.

Patch

diff --git a/hw/msix.c b/hw/msix.c
index 600f5fb..b20cf7c 100644
--- a/hw/msix.c
+++ b/hw/msix.c
@@ -16,15 +16,12 @@ 
 #include "pci.h"
 #include "range.h"
 
-/* MSI-X capability structure */
-#define MSIX_TABLE_OFFSET 4
-#define MSIX_PBA_OFFSET 8
 #define MSIX_CAP_LENGTH 12
 
-/* MSI enable bit and maskall bit are in byte 1 in FLAGS register */
-#define MSIX_CONTROL_OFFSET (PCI_MSIX_FLAGS + 1)
-#define MSIX_ENABLE_MASK (PCI_MSIX_FLAGS_ENABLE >> 8)
-#define MSIX_MASKALL_MASK (PCI_MSIX_FLAGS_MASKALL >> 8)
+/* MSI enable bit and maskall bit are in byte 1 in control register */
+#define MSIX_CONTROL_OFFSET (PCI_MSIX_CTRL + 1)
+#define MSIX_ENABLE_MASK (PCI_MSIX_ENABLE >> 8)
+#define MSIX_MASKALL_MASK (PCI_MSIX_MASK >> 8)
 
 /* MSI-X table format */
 #define MSIX_MSG_ADDR 0
@@ -58,8 +55,9 @@  static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
     uint8_t *config;
     uint32_t new_size;
 
-    if (nentries < 1 || nentries > PCI_MSIX_FLAGS_QSIZE + 1)
+    if (nentries < 1 || nentries > PCI_MSIX_TABSIZE + 1) {
         return -EINVAL;
+    }
     if (bar_size > 0x80000000)
         return -ENOSPC;
 
@@ -80,11 +78,11 @@  static int msix_add_config(struct PCIDevice *pdev, unsigned short nentries,
         return config_offset;
     config = pdev->config + config_offset;
 
-    pci_set_word(config + PCI_MSIX_FLAGS, nentries - 1);
+    pci_set_word(config + PCI_MSIX_CTRL, nentries - 1);
     /* Table on top of BAR */
-    pci_set_long(config + MSIX_TABLE_OFFSET, bar_size | bar_nr);
+    pci_set_long(config + PCI_MSIX_TABLE, bar_size | bar_nr);
     /* Pending bits on top of that */
-    pci_set_long(config + MSIX_PBA_OFFSET, (bar_size + MSIX_PAGE_PENDING) |
+    pci_set_long(config + PCI_MSIX_PBA, (bar_size + MSIX_PAGE_PENDING) |
                  bar_nr);
     pdev->msix_cap = config_offset;
     /* Make flags bit writable. */
@@ -208,11 +206,11 @@  void msix_mmio_map(PCIDevice *d, int region_num,
                    pcibus_t addr, pcibus_t size, int type)
 {
     uint8_t *config = d->config + d->msix_cap;
-    uint32_t table = pci_get_long(config + MSIX_TABLE_OFFSET);
+    uint32_t table = pci_get_long(config + PCI_MSIX_TABLE);
     uint32_t offset = table & ~(MSIX_PAGE_SIZE - 1);
     /* TODO: for assigned devices, we'll want to make it possible to map
      * pending bits separately in case they are in a separate bar. */
-    int table_bir = table & PCI_MSIX_FLAGS_BIRMASK;
+    int table_bir = table & PCI_MSIX_BIR;
 
     if (table_bir != region_num)
         return;
diff --git a/hw/pci_regs.h b/hw/pci_regs.h
index 5a5ab89..c17c22f 100644
--- a/hw/pci_regs.h
+++ b/hw/pci_regs.h
@@ -300,12 +300,14 @@ 
 #define PCI_MSI_DATA_64		12	/* 16 bits of data for 64-bit devices */
 #define PCI_MSI_MASK_64		16	/* Mask bits register for 64-bit devices */
 
-/* MSI-X registers (these are at offset PCI_MSIX_FLAGS) */
-#define PCI_MSIX_FLAGS		2
-#define  PCI_MSIX_FLAGS_QSIZE	0x7FF
-#define  PCI_MSIX_FLAGS_ENABLE	(1 << 15)
-#define  PCI_MSIX_FLAGS_MASKALL	(1 << 14)
-#define PCI_MSIX_FLAGS_BIRMASK	(7 << 0)
+/* MSI-X registers */
+#define PCI_MSIX_CTRL           2       /* Message control */
+#define  PCI_MSIX_TABSIZE       0x7FF   /* Table size - 1 */
+#define  PCI_MSIX_MASK          0x4000  /* Mask all vectors */
+#define  PCI_MSIX_ENABLE        0x8000  /* Enable MSI-X */
+#define PCI_MSIX_TABLE          4       /* MSI-X table */
+#define PCI_MSIX_PBA            8       /* Pending bit array */
+#define  PCI_MSIX_BIR           0x7     /* BAR indication register */
 
 /* CompactPCI Hotswap Register */