From patchwork Wed Nov 7 16:28:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Fredrik Noring X-Patchwork-Id: 994366 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-489267-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=nocrew.org Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="lyJDozgS"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42qsKf73bZz9sCQ for ; Thu, 8 Nov 2018 03:28:22 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; q=dns; s=default; b=O99uFadpsVa3Wk1zmgmkfmoaySUkaa45t3XvSvFuJtH96P5iw7 jqbXD+++6N4gvYiDCLW8Lu/0IFuI3OVZ21L3ohahT1tAEuazTJSH6V3Vy18j2RfD yu+G6Hj8Wg3zIr47rQMhyDGKT+QPgkY/R00CWxlQyL2OZtgW3BAae4kRU= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:date :from:to:cc:subject:message-id:mime-version:content-type; s= default; bh=ETERWxdJM0EH5YJSiaFJraBabdg=; b=lyJDozgS2JZrYmuWxgN8 yUfLWi2pR0UBg4gGbT/lWkLJvVFbyWOf+ZE6sFfKwwaxamNFz4LJorp5Ep1m+qsA kd5gQWxyH1nBbg9PShz4j+j/2bSYyf6ZBFZtPOJbPMdY+rpOdwpFPLgCIeoSbtUn juAbm/1G6QAPOQYbJwmndH0= Received: (qmail 129036 invoked by alias); 7 Nov 2018 16:28:15 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 129023 invoked by uid 89); 7 Nov 2018 16:28:15 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.8 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, KAM_LAZY_DOMAIN_SECURITY, RCVD_IN_DNSWL_LOW autolearn=ham version=3.3.2 spammy=correction, chip, preceding, orion X-HELO: pio-pvt-msa1.bahnhof.se Received: from pio-pvt-msa1.bahnhof.se (HELO pio-pvt-msa1.bahnhof.se) (79.136.2.40) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 07 Nov 2018 16:28:12 +0000 Received: from localhost (localhost [127.0.0.1]) by pio-pvt-msa1.bahnhof.se (Postfix) with ESMTP id 61CA63F991; Wed, 7 Nov 2018 17:28:10 +0100 (CET) Received: from pio-pvt-msa1.bahnhof.se ([127.0.0.1]) by localhost (pio-pvt-msa1.bahnhof.se [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XaTi3lyc_KBy; Wed, 7 Nov 2018 17:28:09 +0100 (CET) Received: from localhost (h-41-252.A163.priv.bahnhof.se [46.59.41.252]) (Authenticated sender: mb547485) by pio-pvt-msa1.bahnhof.se (Postfix) with ESMTPA id 200B23F98F; Wed, 7 Nov 2018 17:28:09 +0100 (CET) Date: Wed, 7 Nov 2018 17:28:08 +0100 From: Fredrik Noring To: Matthew Fortune , "Maciej W. Rozycki" , gcc-patches@gcc.gnu.org Cc: =?utf-8?q?J=C3=BCrgen?= Urban Subject: [PATCH] MIPS: Add `-mfix-r5900' option for the R5900 short loop erratum Message-ID: <3124fcb08e433bc230f53fae9d0e7bd6998f8538.1541607095.git.noring@nocrew.org> MIME-Version: 1.0 Content-Disposition: inline User-Agent: Mutt/1.10.1 (2018-07-13) The short loop bug under certain conditions causes loops to execute only once or twice, due to a hardware bug in the R5900 chip. `-march=r5900' already enables the R5900 short loop workaround. However, the R5900 ISA and most other MIPS ISAs are mutually exclusive since R5900-specific instructions are generated as well. The `-mfix-r5900' option can be used in combination with e.g. `-mips2' or `-mips3' to generate generic MIPS binaries that also work with the R5900 target. The workaround is implemented by GAS rather than by GCC. The following small `shortloop.c' file has been used as a test with GCC 8.2.0: void shortloop(void) { __asm__ __volatile__ ( " li $3, 300\n" "loop:\n" " addi $3, -1\n" " addi $4, -1\n" " bne $3, $0, loop\n" " li $4, 3\n" ::); } The following six combinations have been tested: % mipsr5900el-unknown-linux-gnu-gcc -O1 -c shortloop.c % mipsr5900el-unknown-linux-gnu-gcc -O1 -c shortloop.c -mfix-r5900 % mipsr5900el-unknown-linux-gnu-gcc -O1 -c shortloop.c -mno-fix-r5900 % mipsr4000el-unknown-linux-gnu-gcc -O1 -c shortloop.c % mipsr4000el-unknown-linux-gnu-gcc -O1 -c shortloop.c -mfix-r5900 % mipsr4000el-unknown-linux-gnu-gcc -O1 -c shortloop.c -mno-fix-r5900 The R5900 short loop erratum is corrected in exactly three cases: 1. for the target `mipsr5900el' by default; 2. for the target `mipsr5900el' with `-mfix-r5900'; 3. for any other MIPS target (e.g. `mipsr4000el') with `-mfix-r5900'. In all other cases the correction is not made. * gcc/config/mips/mips.c (mips_reorg_process_insns) (mips_option_override): Default to working around R5900 errata only if the processor was selected explicitly. * gcc/config/mips/mips.h: Declare `mfix-r5900' and `mno-fix-r5900'. * gcc/config/mips/mips.opt: Define MASK_FIX_R5900. * gcc/doc/invoke.texi: Document the R5900, `mfix-r5900' and `mno-fix-r5900'. --- gcc/config/mips/mips.c | 14 ++++++++++---- gcc/config/mips/mips.h | 1 + gcc/config/mips/mips.opt | 4 ++++ gcc/doc/invoke.texi | 14 +++++++++++++- 4 files changed, 28 insertions(+), 5 deletions(-) diff --git a/gcc/config/mips/mips.c b/gcc/config/mips/mips.c index ea2fae1d6db..5763ce21427 100644 --- a/gcc/config/mips/mips.c +++ b/gcc/config/mips/mips.c @@ -18881,13 +18881,13 @@ mips_reorg_process_insns (void) if (crtl->profile) cfun->machine->all_noreorder_p = false; - /* Code compiled with -mfix-vr4120, -mfix-rm7000 or -mfix-24k can't be - all noreorder because we rely on the assembler to work around some - errata. The R5900 too has several bugs. */ + /* Code compiled with -mfix-vr4120, -mfix-r5900, -mfix-rm7000 or + -mfix-24k can't be all noreorder because we rely on the assembler + to work around some errata. The R5900 target has several bugs. */ if (TARGET_FIX_VR4120 || TARGET_FIX_RM7000 || TARGET_FIX_24K - || TARGET_MIPS5900) + || TARGET_FIX_R5900) cfun->machine->all_noreorder_p = false; /* The same is true for -mfix-vr4130 if we might generate MFLO or @@ -20244,6 +20244,12 @@ mips_option_override (void) && strcmp (mips_arch_info->name, "r4400") == 0) target_flags |= MASK_FIX_R4400; + /* Default to working around R5900 errata only if the processor + was selected explicitly. */ + if ((target_flags_explicit & MASK_FIX_R5900) == 0 + && strcmp (mips_arch_info->name, "r5900") == 0) + target_flags |= MASK_FIX_R5900; + /* Default to working around R10000 errata only if the processor was selected explicitly. */ if ((target_flags_explicit & MASK_FIX_R10000) == 0 diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 32a88edc910..7dd19fc6f2d 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1363,6 +1363,7 @@ struct mips_cpu_info { %{mmsa} %{mno-msa} \ %{msmartmips} %{mno-smartmips} \ %{mmt} %{mno-mt} \ +%{mfix-r5900} %{mno-fix-r5900} \ %{mfix-rm7000} %{mno-fix-rm7000} \ %{mfix-vr4120} %{mfix-vr4130} \ %{mfix-24k} \ diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index 5a9f255fe20..427ac4913fc 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -165,6 +165,10 @@ mfix-r4400 Target Report Mask(FIX_R4400) Work around certain R4400 errata. +mfix-r5900 +Target Report Mask(FIX_R5900) +Work around the R5900 short loop erratum. + mfix-rm7000 Target Report Var(TARGET_FIX_RM7000) Work around certain RM7000 errata. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index e290128f535..c9846d96304 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -939,6 +939,7 @@ Objective-C and Objective-C++ Dialects}. -mmad -mno-mad -mimadd -mno-imadd -mfused-madd -mno-fused-madd -nocpp @gol -mfix-24k -mno-fix-24k @gol -mfix-r4000 -mno-fix-r4000 -mfix-r4400 -mno-fix-r4400 @gol +-mfix-r5900 -mno-fix-r5900 @gol -mfix-r10000 -mno-fix-r10000 -mfix-rm7000 -mno-fix-rm7000 @gol -mfix-vr4120 -mno-fix-vr4120 @gol -mfix-vr4130 -mno-fix-vr4130 -mfix-sb1 -mno-fix-sb1 @gol @@ -20804,7 +20805,8 @@ The processor names are: @samp{orion}, @samp{p5600}, @samp{p6600}, @samp{r2000}, @samp{r3000}, @samp{r3900}, @samp{r4000}, @samp{r4400}, -@samp{r4600}, @samp{r4650}, @samp{r4700}, @samp{r6000}, @samp{r8000}, +@samp{r4600}, @samp{r4650}, @samp{r4700}, @samp{r5900}, +@samp{r6000}, @samp{r8000}, @samp{rm7000}, @samp{rm9000}, @samp{r10000}, @samp{r12000}, @samp{r14000}, @samp{r16000}, @samp{sb1}, @@ -21578,6 +21580,16 @@ branch-likely instructions. @option{-mfix-r10000} is the default when @option{-march=r10000} is used; @option{-mno-fix-r10000} is the default otherwise. +@item -mfix-r5900 +@itemx -mno-fix-r5900 +@opindex mfix-r5900 +Do not attempt to schedule the preceding instruction into the delay slot +of a branch instruction placed at the end of a short loop of six +instructions or fewer and always schedule a @code{nop} instruction there +instead. The short loop bug under certain conditions causes loops to +execute only once or twice, due to a hardware bug in the R5900 chip. The +workaround is implemented by the assembler rather than by GCC@. + @item -mfix-rm7000 @itemx -mno-fix-rm7000 @opindex mfix-rm7000