From patchwork Wed Nov 7 09:14:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Hua X-Patchwork-Id: 994151 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gcc.gnu.org (client-ip=209.132.180.131; helo=sourceware.org; envelope-from=gcc-patches-return-489217-incoming=patchwork.ozlabs.org@gcc.gnu.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=gcc.gnu.org header.i=@gcc.gnu.org header.b="T0nbnofB"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="nIRbZKXu"; dkim-atps=neutral Received: from sourceware.org (server1.sourceware.org [209.132.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42qgj23F9Bz9sCm for ; Wed, 7 Nov 2018 20:14:30 +1100 (AEDT) DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:references:in-reply-to:from:date:message-id :subject:to:cc:content-type; q=dns; s=default; b=rPQyceI60B0IayC 59AQTvDh6V6jh9XbN+H+fcbOyRErKSCc4BguW9ZPl1Y3jqtBtTijTrAJyOCZ65oY 4fvPYZOE0/bRG5hpwPmbEAq57aGhC2fjW8V+V4NACEA1DE3LeMcDUYOYkmA4DcsJ ogDZM+dEEwO7kwbkjvCn96Jvr5k4= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender :mime-version:references:in-reply-to:from:date:message-id :subject:to:cc:content-type; s=default; bh=2xzDQut9Lu+0WDZ8OUOXP +txaKs=; b=T0nbnofB4eO3UwKWVYM/OrlsTtbnt1e6uqmwaUlEciJWJNWcxzF3/ E2SC6BV+bZ0CoGYYMwr+aTvqBvL6xjlT4QBmDEw6Kha8q47Yh2vtXpfJxgweVHrs PGi7fZUHNyzevDFmosOAw2/D0j3N0xWcbabehiA+DeMhwYnKR8Cz+4= Received: (qmail 27824 invoked by alias); 7 Nov 2018 09:14:23 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 27814 invoked by uid 89); 7 Nov 2018 09:14:23 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-25.5 required=5.0 tests=AWL, BAYES_00, FREEMAIL_FROM, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.2 spammy=9217 X-HELO: mail-ot1-f51.google.com Received: from mail-ot1-f51.google.com (HELO mail-ot1-f51.google.com) (209.85.210.51) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 07 Nov 2018 09:14:21 +0000 Received: by mail-ot1-f51.google.com with SMTP id n46so9916061otb.9 for ; Wed, 07 Nov 2018 01:14:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=mime-version:references:in-reply-to:from:date:message-id:subject:to :cc; bh=QgM90SIilK9iZR4xqtFQOi13si4iDfVdFAjF/JdliK0=; b=nIRbZKXuO34P9V4XPbWu7M+mgQyAbAPpPhdn4fUylXO9xqj+mK+b6CarGCbU+qxuU2 FX/X2nSOkqHRhgAdIIoFje4cD91lxPgBUZ7oAEN8kguxAAAOx73IzRBL0ukzGmFEbwvV f9DNPf0tN4e4haBl7KZXKXVegm3YxU6M3XiAXma4tEc3oCwOx8CjpwFpeQE5FGUbQHUP AyRuZUuGfmRP4/i8j/KDqDsv90WRd1x8Wf6IDrSNp7kG8y5VFTfbichj6bDVwcisHVKv 5SmRDnp8NYPQi0MKYAZvXlNkY+nciLRbhCKxlWSKyD+2QRspKk+zLICHxQPLpK3LBA5N 86vw== MIME-Version: 1.0 References: In-Reply-To: From: Paul Hua Date: Wed, 7 Nov 2018 17:14:07 +0800 Message-ID: Subject: [PATCH v4 2/6, Committed] [MIPS] Split Loongson EXTensions (EXT) instructions from loongson3a To: gcc-patches Cc: Matthew Fortune X-IsSubscribed: yes On Tue, Oct 16, 2018 at 10:50 AM Paul Hua wrote: > > From b1dfcb228934e3cde90f408056192ed7faff4417 Mon Sep 17 00:00:00 2001 From: Chenghua Xu Date: Tue, 6 Nov 2018 17:04:36 +0800 Subject: [PATCH 2/6] Add support for Loongson EXT instructions. gcc/ * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Add __mips_loongson_ext. (MIPS_ASE_LOONGSON_EXT_SPEC): New. (BASE_DRIVER_SELF_SPECS): march=loongson3a implies -mloongson-ext. (ASM_SPEC): Add mloongson-ext and mno-loongson-ext. * config/mips/mips.md (mul3, mul3_mul3_nohilo, div3, mod3, prefetch): Use TARGET_LOONGSON_EXT instead of TARGET_LOONGSON_3A. * config/mips/mips.opt (-mloongson-ext): Add option. * gcc/doc/invoke.texi (-mloongson-ext): Document. gcc/testsuite/ * gcc.target/mips/mips.exp (mips_option_groups): Add -mloongson-ext option. (mips-dg-options): Add mips_option_dependency options "-mmicromips" vs "-mno-loongson-ext", --- gcc/config/mips/mips.h | 14 +++++++++++++- gcc/config/mips/mips.md | 16 ++++++++-------- gcc/config/mips/mips.opt | 4 ++++ gcc/doc/invoke.texi | 7 +++++++ gcc/testsuite/gcc.target/mips/mips.exp | 2 ++ 5 files changed, 34 insertions(+), 9 deletions(-) diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index 27c0222ee46..7237c8da8ac 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -596,6 +596,12 @@ struct mips_cpu_info { builtin_define ("__mips_loongson_mmi"); \ } \ \ + /* Whether Loongson EXT modes are enabled. */ \ + if (TARGET_LOONGSON_EXT) \ + { \ + builtin_define ("__mips_loongson_ext"); \ + } \ + \ /* Historical Octeon macro. */ \ if (TARGET_OCTEON) \ builtin_define ("__OCTEON__"); \ @@ -881,7 +887,8 @@ struct mips_cpu_info { #define BASE_DRIVER_SELF_SPECS \ MIPS_ISA_NAN2008_SPEC, \ MIPS_ASE_DSP_SPEC, \ - MIPS_ASE_LOONGSON_MMI_SPEC + MIPS_ASE_LOONGSON_MMI_SPEC, \ + MIPS_ASE_LOONGSON_EXT_SPEC #define MIPS_ASE_DSP_SPEC \ "%{!mno-dsp: \ @@ -893,6 +900,10 @@ struct mips_cpu_info { "%{!mno-loongson-mmi: \ %{march=loongson2e|march=loongson2f|march=loongson3a: -mloongson-mmi}}" +#define MIPS_ASE_LOONGSON_EXT_SPEC \ + "%{!mno-loongson-ext: \ + %{march=loongson3a: -mloongson-ext}}" + #define DRIVER_SELF_SPECS \ MIPS_ISA_LEVEL_SPEC, \ BASE_DRIVER_SELF_SPECS @@ -1367,6 +1378,7 @@ struct mips_cpu_info { %{mginv} %{mno-ginv} \ %{mmsa} %{mno-msa} \ %{mloongson-mmi} %{mno-loongson-mmi} \ +%{mloongson-ext} %{mno-loongson-ext} \ %{msmartmips} %{mno-smartmips} \ %{mmt} %{mno-mt} \ %{mfix-rm7000} %{mno-fix-rm7000} \ diff --git a/gcc/config/mips/mips.md b/gcc/config/mips/mips.md index a88c1c53134..4b7a627b7a6 100644 --- a/gcc/config/mips/mips.md +++ b/gcc/config/mips/mips.md @@ -1599,7 +1599,7 @@ { rtx lo; - if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A || ISA_HAS_R6MUL) + if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_EXT || ISA_HAS_R6MUL) emit_insn (gen_mul3_mul3_nohilo (operands[0], operands[1], operands[2])); else if (ISA_HAS_MUL3) @@ -1622,11 +1622,11 @@ [(set (match_operand:GPR 0 "register_operand" "=d") (mult:GPR (match_operand:GPR 1 "register_operand" "d") (match_operand:GPR 2 "register_operand" "d")))] - "TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A || ISA_HAS_R6MUL" + "TARGET_LOONGSON_2EF || TARGET_LOONGSON_EXT || ISA_HAS_R6MUL" { if (TARGET_LOONGSON_2EF) return "multu.g\t%0,%1,%2"; - else if (TARGET_LOONGSON_3A) + else if (TARGET_LOONGSON_EXT) return "gsmultu\t%0,%1,%2"; else return "mul\t%0,%1,%2"; @@ -3016,11 +3016,11 @@ [(set (match_operand:GPR 0 "register_operand" "=&d") (any_div:GPR (match_operand:GPR 1 "register_operand" "d") (match_operand:GPR 2 "register_operand" "d")))] - "TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A || ISA_HAS_R6DIV" + "TARGET_LOONGSON_2EF || TARGET_LOONGSON_EXT || ISA_HAS_R6DIV" { if (TARGET_LOONGSON_2EF) return mips_output_division ("div.g\t%0,%1,%2", operands); - else if (TARGET_LOONGSON_3A) + else if (TARGET_LOONGSON_EXT) return mips_output_division ("gsdiv\t%0,%1,%2", operands); else return mips_output_division ("div\t%0,%1,%2", operands); @@ -3032,11 +3032,11 @@ [(set (match_operand:GPR 0 "register_operand" "=&d") (any_mod:GPR (match_operand:GPR 1 "register_operand" "d") (match_operand:GPR 2 "register_operand" "d")))] - "TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A || ISA_HAS_R6DIV" + "TARGET_LOONGSON_2EF || TARGET_LOONGSON_EXT || ISA_HAS_R6DIV" { if (TARGET_LOONGSON_2EF) return mips_output_division ("mod.g\t%0,%1,%2", operands); - else if (TARGET_LOONGSON_3A) + else if (TARGET_LOONGSON_EXT) return mips_output_division ("gsmod\t%0,%1,%2", operands); else return mips_output_division ("mod\t%0,%1,%2", operands); @@ -7136,7 +7136,7 @@ (match_operand 2 "const_int_operand" "n"))] "ISA_HAS_PREFETCH && TARGET_EXPLICIT_RELOCS" { - if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_3A) + if (TARGET_LOONGSON_2EF || TARGET_LOONGSON_EXT) { /* Loongson 2[ef] and Loongson 3a use load to $0 for prefetching. */ if (TARGET_64BIT) diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt index 6767c47fa65..a8fe8db3c66 100644 --- a/gcc/config/mips/mips.opt +++ b/gcc/config/mips/mips.opt @@ -463,3 +463,7 @@ Enum(mips_cb_setting) String(always) Value(MIPS_CB_ALWAYS) mloongson-mmi Target Report Mask(LOONGSON_MMI) Use Loongson MultiMedia extensions Instructions (MMI) instructions. + +mloongson-ext +Target Report Mask(LOONGSON_EXT) +Use Loongson EXTension (EXT) instructions. diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index ba98b489fad..ae92323eb06 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -921,6 +921,7 @@ Objective-C and Objective-C++ Dialects}. -mmicromips -mno-micromips @gol -mmsa -mno-msa @gol -mloongson-mmi -mno-loongson-mmi @gol +-mloongson-ext -mno-loongson-ext @gol -mfpu=@var{fpu-type} @gol -msmartmips -mno-smartmips @gol -mpaired-single -mno-paired-single -mdmx -mno-mdmx @gol @@ -21294,6 +21295,12 @@ Use (do not use) the MIPS Global INValidate (GINV) instructions. @opindex mno-loongson-mmi Use (do not use) the MIPS Loongson MultiMedia extensions Instructions (MMI). +@item -mloongson-ext +@itemx -mno-loongson-ext +@opindex mloongson-ext +@opindex mno-loongson-ext +Use (do not use) the MIPS Loongson EXTensions (EXT) instructions. + @item -mlong64 @opindex mlong64 Force @code{long} types to be 64 bits wide. See @option{-mlong32} for diff --git a/gcc/testsuite/gcc.target/mips/mips.exp b/gcc/testsuite/gcc.target/mips/mips.exp index 9e447b554f3..ceb86cc0276 100644 --- a/gcc/testsuite/gcc.target/mips/mips.exp +++ b/gcc/testsuite/gcc.target/mips/mips.exp @@ -297,6 +297,7 @@ foreach option { odd-spreg msa loongson-mmi + loongson-ext } { lappend mips_option_groups $option "-m(no-|)$option" } @@ -1055,6 +1056,7 @@ proc mips-dg-options { args } { mips_option_dependency options "-mips16" "-mno-loongson-mmi" mips_option_dependency options "-mmicromips" "-mno-loongson-mmi" mips_option_dependency options "-msoft-float" "-mno-loongson-mmi" + mips_option_dependency options "-mmicromips" "-mno-loongson-ext" # Work out information about the current ABI. set abi_test_option_p [mips_test_option_p options abi] -- 2.18.0