diff mbox series

[U-Boot,v2,41/58] powerpc: mpc83xx: Fix MPC8308 IMMR memory layout

Message ID 20181105144512.16727-41-mario.six@gdsys.cc
State Superseded
Delegated to: Mario Six
Headers show
Series [U-Boot,v2,01/58] mpc83xx: Introduce ARCH_MPC830* | expand

Commit Message

Mario Six Nov. 5, 2018, 2:44 p.m. UTC
The MPC8308 has two I2C controllers, but no PCI controller.

Fix the register map layout for this SoC.

Signed-off-by: Mario Six <mario.six@gdsys.cc>

---

v1 -> v2:
New in v2

---
 arch/powerpc/cpu/mpc83xx/Makefile     |  2 ++
 arch/powerpc/include/asm/immap_83xx.h | 44 +++++++++++++++++++++++++++++++----
 2 files changed, 42 insertions(+), 4 deletions(-)
diff mbox series

Patch

diff --git a/arch/powerpc/cpu/mpc83xx/Makefile b/arch/powerpc/cpu/mpc83xx/Makefile
index aa4affa911b..304029977e5 100644
--- a/arch/powerpc/cpu/mpc83xx/Makefile
+++ b/arch/powerpc/cpu/mpc83xx/Makefile
@@ -29,7 +29,9 @@  obj-y += interrupts.o
 obj-y += ecc.o
 obj-$(CONFIG_QE) += qe_io.o
 obj-$(CONFIG_FSL_SERDES) += serdes.o
+ifndef CONFIG_ARCH_MPC8308
 obj-$(CONFIG_PCI) += pci.o
+endif
 obj-$(CONFIG_PCIE) += pcie.o
 obj-$(CONFIG_OF_LIBFDT) += fdt.o
 
diff --git a/arch/powerpc/include/asm/immap_83xx.h b/arch/powerpc/include/asm/immap_83xx.h
index 30bbd5671ba..52a93bd81da 100644
--- a/arch/powerpc/include/asm/immap_83xx.h
+++ b/arch/powerpc/include/asm/immap_83xx.h
@@ -714,7 +714,7 @@  typedef struct immap {
 	u8			res7[0xC0000];
 } immap_t;
 
-#elif defined(CONFIG_ARCH_MPC8308) || defined(CONFIG_ARCH_MPC8315)
+#elif defined(CONFIG_ARCH_MPC8315)
 typedef struct immap {
 	sysconf83xx_t		sysconf;	/* System configuration */
 	wdt83xx_t		wdt;		/* Watch Dog Timer (WDT) Registers */
@@ -729,8 +729,8 @@  typedef struct immap {
 	gpio83xx_t		gpio[1];	/* General purpose I/O module */
 	u8			res0[0x1300];
 	ddr83xx_t		ddr;		/* DDR Memory Controller Memory */
-	fsl_i2c_t		i2c[2];		/* I2C Controllers */
-	u8			res1[0x1300];
+	fsl_i2c_t		i2c[1];		/* I2C Controllers */
+	u8			res1[0x1400];
 	duart83xx_t		duart[2];	/* DUART */
 	u8			res2[0x900];
 	fsl_lbc_t		im_lbc;		/* Local Bus Controller Regs */
@@ -759,7 +759,43 @@  typedef struct immap {
 	u8			res12[0x1CF00];
 } immap_t;
 
-#elif defined(CONFIG_ARCH_MPC837X)
+#elif defined(CONFIG_ARCH_MPC8308)
+typedef struct immap {
+	sysconf83xx_t		sysconf;	/* System configuration */
+	wdt83xx_t		wdt;		/* Watch Dog Timer (WDT) Registers */
+	rtclk83xx_t		rtc;		/* Real Time Clock Module Registers */
+	rtclk83xx_t		pit;		/* Periodic Interval Timer */
+	gtm83xx_t		gtm[1];		/* Global Timers Module */
+	u8			res0[0x100];
+	ipic83xx_t		ipic;		/* Integrated Programmable Interrupt Controller */
+	arbiter83xx_t		arbiter;	/* System Arbiter Registers */
+	reset83xx_t		reset;		/* Reset Module */
+	clk83xx_t		clk;		/* System Clock Module */
+	pmc83xx_t		pmc;		/* Power Management Control Module */
+	gpio83xx_t		gpio[1];	/* General purpose I/O module */
+	u8			res1[0x1300];
+	ddr83xx_t		ddr;		/* DDR Memory Controller Memory */
+	fsl_i2c_t		i2c[2];		/* I2C Controllers */
+	u8			res2[0x1300];
+	duart83xx_t		duart[2];	/* DUART */
+	u8			res3[0x900];
+	fsl_lbc_t		im_lbc;		/* Local Bus Controller Regs */
+	u8			res4[0x1000];
+	spi8xxx_t		spi;		/* Serial Peripheral Interface */
+	u8			res5[0x1000];
+	pex83xx_t		pciexp[1];	/* PCI Express Controller */
+	u8			res6[0x19000];
+	usb83xx_t		usb[1];		/* USB DR Controller */
+	tsec83xx_t		tsec[2];
+	u8			res7[0x6000];
+	tdmdmac83xx_t		tdmdmac;	/* TDM DMAC */
+	sdhc83xx_t		sdhc;		/* SDHC Controller */
+	u8			res8[0xb4000];
+	serdes83xx_t		serdes[1];	/* SerDes Registers */
+	u8			res9[0x1CF00];
+} immap_t;
+
+#elif defined(CONFIG_ARCH_MPC837x)
 typedef struct immap {
 	sysconf83xx_t		sysconf;	/* System configuration */
 	wdt83xx_t		wdt;		/* Watch Dog Timer (WDT) Registers */