Patchwork [U-Boot,5/6] arm/km: enable PCIE_INIT for Port-L2

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Submitter Holger Brunck
Date June 7, 2011, 10:45 a.m.
Message ID <1307443544-10169-6-git-send-email-holger.brunck@keymile.com>
Download mbox | patch
Permalink /patch/99112/
State Superseded
Headers show

Comments

Holger Brunck - June 7, 2011, 10:45 a.m.
From: Valentin Longchamp <valentin.longchamp@keymile.com>

Port-L2 uses PCIE. So move the undef of this option from generic
km_arm.h to the board specific header.

Signed-off-by: Valentin Longchamp <valentin.longchamp@keymile.com>
Signed-off-by: Holger Brunck <holger.brunck@keymile.com>
cc: Prafulla Wadaskar <prafulla@marvell.com>
cc: Heiko Schocher <hs@denx.de>
---
 include/configs/km/km_arm.h |    1 -
 include/configs/mgcoge3un.h |    5 +++++
 include/configs/portl2.h    |    5 +++++
 include/configs/suen3.h     |    5 +++++
 include/configs/suen8.h     |    5 +++++
 5 files changed, 20 insertions(+), 1 deletions(-)

Patch

diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index d642ba1..c422d57 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -77,7 +77,6 @@ 
 #define CONFIG_MD5	/* get_random_hex on krikwood needs MD5 support */
 #define CONFIG_SKIP_LOWLEVEL_INIT	/* disable board lowlevel_init */
 #define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
-#undef  CONFIG_KIRKWOOD_PCIE_INIT	/* Disable PCIE Port0 for kernel */
 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */
 
 #define CONFIG_MISC_INIT_R
diff --git a/include/configs/mgcoge3un.h b/include/configs/mgcoge3un.h
index 6d56d7d..34bb192 100644
--- a/include/configs/mgcoge3un.h
+++ b/include/configs/mgcoge3un.h
@@ -75,4 +75,9 @@ 
 	MVGBE_SET_GMII_SPEED_TO_10_100	|\
 	MVGBE_SET_MII_SPEED_TO_100)
 
+/*
+ * PCIe port not used on mgcoge3un
+ */
+#undef  CONFIG_KIRKWOOD_PCIE_INIT
+
 #endif /* _CONFIG_MGCOGE3UN_H */
diff --git a/include/configs/portl2.h b/include/configs/portl2.h
index 10ce7c8..a8543a5 100644
--- a/include/configs/portl2.h
+++ b/include/configs/portl2.h
@@ -73,4 +73,9 @@ 
 	MVGBE_SET_GMII_SPEED_TO_10_100	|\
 	MVGBE_SET_MII_SPEED_TO_100)
 
+/*
+ * portl2 does use the PCIe Port0
+ */
+#define  CONFIG_KIRKWOOD_PCIE_INIT
+
 #endif /* _CONFIG_PORTL2_H */
diff --git a/include/configs/suen3.h b/include/configs/suen3.h
index 0f1b11e..7f6e95f 100644
--- a/include/configs/suen3.h
+++ b/include/configs/suen3.h
@@ -46,4 +46,9 @@ 
 #define KM_IVM_BUS	"pca9544a:70:9"	/* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9544a:70:d"	/* I2C2 (Mux-Port 5)*/
 
+/*
+ * PCIe port not used on suen8
+ */
+#undef  CONFIG_KIRKWOOD_PCIE_INIT
+
 #endif /* _CONFIG_SUEN3_H */
diff --git a/include/configs/suen8.h b/include/configs/suen8.h
index 78cee75..d3d9b5c 100644
--- a/include/configs/suen8.h
+++ b/include/configs/suen8.h
@@ -47,4 +47,9 @@ 
 #define KM_IVM_BUS	"pca9544a:70:9" /* I2C2 (Mux-Port 1)*/
 #define KM_ENV_BUS	"pca9544a:70:d" /* I2C2 (Mux-Port 5)*/
 
+/*
+ * PCIe port not used on suen8
+ */
+#undef  CONFIG_KIRKWOOD_PCIE_INIT
+
 #endif /* _CONFIG_SUEN8_H */