Message ID | 1540311509-23970-9-git-send-email-aleksandar.markovic@rt-rk.com |
---|---|
State | New |
Headers | show
Return-Path: <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=<UNKNOWN>) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=rt-rk.com Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42fdxL1RTlz9sCs for <incoming@patchwork.ozlabs.org>; Wed, 24 Oct 2018 03:23:50 +1100 (AEDT) Received: from localhost ([::1]:43236 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>) id 1gEzT9-0000fS-9M for incoming@patchwork.ozlabs.org; Tue, 23 Oct 2018 12:23:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56895) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from <aleksandar.markovic@rt-rk.com>) id 1gEzPm-0006Ts-3s for qemu-devel@nongnu.org; Tue, 23 Oct 2018 12:20:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from <aleksandar.markovic@rt-rk.com>) id 1gEzPe-0001H0-NP for qemu-devel@nongnu.org; Tue, 23 Oct 2018 12:20:14 -0400 Received: from mx2.rt-rk.com ([89.216.37.149]:45318 helo=mail.rt-rk.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from <aleksandar.markovic@rt-rk.com>) id 1gEzPe-0001FW-8X for qemu-devel@nongnu.org; Tue, 23 Oct 2018 12:20:10 -0400 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 142AE1A23AF; Tue, 23 Oct 2018 18:20:08 +0200 (CEST) X-Virus-Scanned: amavisd-new at rt-rk.com Received: from rtrkw774-lin.mipstec.com (rtrkw774-lin.domain.local [10.10.13.43]) by mail.rt-rk.com (Postfix) with ESMTPSA id C42591A21B4; Tue, 23 Oct 2018 18:20:07 +0200 (CEST) From: Aleksandar Markovic <aleksandar.markovic@rt-rk.com> To: qemu-devel@nongnu.org Date: Tue, 23 Oct 2018 18:18:19 +0200 Message-Id: <1540311509-23970-9-git-send-email-aleksandar.markovic@rt-rk.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1540311509-23970-1-git-send-email-aleksandar.markovic@rt-rk.com> References: <1540311509-23970-1-git-send-email-aleksandar.markovic@rt-rk.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x X-Received-From: 89.216.37.149 Subject: [Qemu-devel] [PATCH v6 08/18] target/mips: Add bit encoding for MXU execute add/sub pattern 'eptn2' X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <http://lists.nongnu.org/archive/html/qemu-devel/> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: jancraig@amazon.com, smarkovic@wavecomp.com, richard.henderson@linaro.org, amarkovic@wavecomp.com, pjovanovic@wavecomp.com, aurelien@aurel32.net Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> |
Series |
target/mips: Add limited support for Ingenic's MXU ASE
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expand
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diff --git a/target/mips/translate.c b/target/mips/translate.c index 97fb2e0..665a584 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -23855,6 +23855,12 @@ static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx) #define MXU_APTN2_SA 2 #define MXU_APTN2_SS 3 +/* MXU execute add/subtract 2-bit pattern 'eptn2' */ +#define MXU_EPTN2_AA 0 +#define MXU_EPTN2_AS 1 +#define MXU_EPTN2_SA 2 +#define MXU_EPTN2_SS 3 + /* *