diff mbox series

[v6,04/18] target/mips: Add and integrate MXU decoding engine placeholder

Message ID 1540311509-23970-5-git-send-email-aleksandar.markovic@rt-rk.com
State New
Headers show
Series target/mips: Add limited support for Ingenic's MXU ASE | expand

Commit Message

Aleksandar Markovic Oct. 23, 2018, 4:18 p.m. UTC 
From: Aleksandar Markovic <amarkovic@wavecomp.com>

Provide the placeholder and add the invocation logic for MXU
decoding engine.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 8 ++++++++
 1 file changed, 8 insertions(+)
diff mbox series

Patch

diff --git a/target/mips/translate.c b/target/mips/translate.c
index fefe9ac..128cabe 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -23844,6 +23844,12 @@  static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
     }
 }
 
+static void decode_opc_mxu(CPUMIPSState *env, DisasContext *ctx)
+{
+    MIPS_INVAL("decode_opc_mxu");
+    generate_exception_end(ctx, EXCP_RI);
+}
+
 static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx)
 {
     int rs, rt, rd;
@@ -26087,6 +26093,8 @@  static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
     case OPC_SPECIAL2:
         if ((ctx->insn_flags & INSN_R5900) && (ctx->insn_flags & ASE_MMI)) {
             decode_tx79_mmi(env, ctx);
+        } else if (ctx->insn_flags & ASE_MXU) {
+            decode_opc_mxu(env, ctx);
         } else {
             decode_opc_special2_legacy(env, ctx);
         }