diff mbox series

[uclibc-ng-devel,ARM,FDPIC] : Add support for Thumb-only processors.

Message ID CAKdteOYsimiP+NsuPm7K2=J_LhZb49tpEqBwciyGU-OaYgevbw@mail.gmail.com
State Accepted
Headers show
Series [uclibc-ng-devel,ARM,FDPIC] : Add support for Thumb-only processors. | expand

Commit Message

Christophe Lyon Oct. 23, 2018, 2:55 p.m. UTC 
Hi,

This patch enables to compile uClibc-ng in FDPIC mode with a compiler
defaulting to Thumb mode (eg. targeting a cortex-M processor).

OK?

Thanks,

Christophe
[ARM][FDPIC]: Add support for Thumb-only processors.

	* ldso/ldso/arm/aeabi_read_tp.S: Add Thumb version.
	* ldso/ldso/arm/dl-startup.h: Do not force ARM encoding, adjust
	for Thumb.
	* ldso/ldso/arm/resolve.S: Force Thumb encoding on Thumb-only
	processors.
	* ldso/ldso/arm/thumb_atomics.S: Disable on FDPIC, seems useless.
	* libc/sysdeps/linux/arm/crt1.S: Do not force ARM encoding, adjust
	for Thumb.

Signed-off-by: Mickaël Guêné <mickael.guene@st.com>
Signed-off-by: Christophe Lyon <christophe.lyon@st.com>

Comments

Waldemar Brodkorb Oct. 24, 2018, 12:39 p.m. UTC | #1 
Hi,

are the gcc patches upstream now?

Christophe Lyon wrote,

> Hi,
> 
> This patch enables to compile uClibc-ng in FDPIC mode with a compiler
> defaulting to Thumb mode (eg. targeting a cortex-M processor).
> 
> OK?

Think so. I want to test them.

best regards
 Waldemar
Christophe Lyon Oct. 24, 2018, 12:52 p.m. UTC | #2 
On Wed, 24 Oct 2018 at 14:39, Waldemar Brodkorb <wbx@uclibc-ng.org> wrote:
>
> Hi,
>
> are the gcc patches upstream now?
>
They are still under discussion with the maintainers.

> Christophe Lyon wrote,
>
> > Hi,
> >
> > This patch enables to compile uClibc-ng in FDPIC mode with a compiler
> > defaulting to Thumb mode (eg. targeting a cortex-M processor).
> >
> > OK?
>
> Think so. I want to test them.
>
OK, thanks.

> best regards
>  Waldemar
Waldemar Brodkorb Oct. 27, 2018, 8:56 a.m. UTC | #3 
Hi,

patch does not apply on master:

git am ../c
Applying: Add support for Thumb-only processors.
error: ldso/ldso/arm/thumb_atomics.S: does not exist in index
Patch failed at 0001 Add support for Thumb-only processors.
The copy of the patch that failed is found in:
   /home/wbx/uclibc-ng/.git/rebase-apply/patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am
--abort".

best regards
 Waldemar

> On Wed, 24 Oct 2018 at 14:39, Waldemar Brodkorb <wbx@uclibc-ng.org> wrote:
> >
> > Hi,
> >
> > are the gcc patches upstream now?
> >
> They are still under discussion with the maintainers.
> 
> > Christophe Lyon wrote,
> >
> > > Hi,
> > >
> > > This patch enables to compile uClibc-ng in FDPIC mode with a compiler
> > > defaulting to Thumb mode (eg. targeting a cortex-M processor).
> > >
> > > OK?
> >
> > Think so. I want to test them.
> >
> OK, thanks.
> 
> > best regards
> >  Waldemar
>
Christophe Lyon Oct. 29, 2018, 2:39 p.m. UTC | #4 
On Sat, 27 Oct 2018 at 10:56, Waldemar Brodkorb <wbx@uclibc-ng.org> wrote:
>
> Hi,
>
> patch does not apply on master:
>

Sorry for that. Here is a rebased version.

> git am ../c
> Applying: Add support for Thumb-only processors.
> error: ldso/ldso/arm/thumb_atomics.S: does not exist in index
> Patch failed at 0001 Add support for Thumb-only processors.
> The copy of the patch that failed is found in:
>    /home/wbx/uclibc-ng/.git/rebase-apply/patch
> When you have resolved this problem, run "git am --continue".
> If you prefer to skip this patch, run "git am --skip" instead.
> To restore the original branch and stop patching, run "git am
> --abort".
>
> best regards
>  Waldemar
>
> > On Wed, 24 Oct 2018 at 14:39, Waldemar Brodkorb <wbx@uclibc-ng.org> wrote:
> > >
> > > Hi,
> > >
> > > are the gcc patches upstream now?
> > >
> > They are still under discussion with the maintainers.
> >
> > > Christophe Lyon wrote,
> > >
> > > > Hi,
> > > >
> > > > This patch enables to compile uClibc-ng in FDPIC mode with a compiler
> > > > defaulting to Thumb mode (eg. targeting a cortex-M processor).
> > > >
> > > > OK?
> > >
> > > Think so. I want to test them.
> > >
> > OK, thanks.
> >
> > > best regards
> > >  Waldemar
> >
From 391e6a993c616021ff064ec768adbc253bf4a39f Mon Sep 17 00:00:00 2001
From: Christophe Lyon <christophe.lyon@linaro.org>
Date: Mon, 29 Oct 2018 14:34:25 +0000
Subject: [PATCH 1/1] [ARM][FDPIC]: Add support for Thumb-only processors.
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit

	* ldso/ldso/arm/aeabi_read_tp.S: Add Thumb version.
	* ldso/ldso/arm/dl-startup.h: Do not force ARM encoding, adjust
	for Thumb.
	* ldso/ldso/arm/resolve.S: Force Thumb encoding on Thumb-only
	processors.
	* libc/sysdeps/linux/arm/crt1.S: Do not force ARM encoding, adjust
	for Thumb.

Signed-off-by: Mickaël Guêné <mickael.guene@st.com>
Signed-off-by: Christophe Lyon <christophe.lyon@st.com>
---
 ldso/ldso/arm/aeabi_read_tp.S | 14 ++++++++++++++
 ldso/ldso/arm/dl-startup.h    | 10 +++++++++-
 ldso/ldso/arm/resolve.S       | 10 +++++++++-
 libc/sysdeps/linux/arm/crt1.S |  8 +++++++-
 4 files changed, 39 insertions(+), 3 deletions(-)

diff --git a/ldso/ldso/arm/aeabi_read_tp.S b/ldso/ldso/arm/aeabi_read_tp.S
index 77e0d6e..5ab5125 100644
--- a/ldso/ldso/arm/aeabi_read_tp.S
+++ b/ldso/ldso/arm/aeabi_read_tp.S
@@ -53,9 +53,23 @@
 #else
 	.hidden __aeabi_read_tp
 #endif
+#if !defined(__ARM_ARCH_ISA_ARM)
+	.thumb_func
+	.thumb
+	.syntax unified
+	ENTRY (__aeabi_read_tp)
+	push	{r7}
+	mov	r7, #0x0f0000
+	orr	r7, r7, #6
+	svc	#0
+	pop	{r7}
+	bx	lr
+#else
+	.arm
 ENTRY (__aeabi_read_tp)
 	mov	r0, #0xffff0fff
 	sub	pc, r0, #31
+#endif
 END (__aeabi_read_tp)
 
 #endif /* __UCLIBC_HAS_THREADS_NATIVE__ */
diff --git a/ldso/ldso/arm/dl-startup.h b/ldso/ldso/arm/dl-startup.h
index 06c95cb..cacd461 100644
--- a/ldso/ldso/arm/dl-startup.h
+++ b/ldso/ldso/arm/dl-startup.h
@@ -11,10 +11,13 @@
 #if defined(__FDPIC__)
 #if !defined(__thumb__) || defined(__thumb2__)
 __asm__(
-	"	.arm\n"
 	"	.text\n"
 	"	.globl  _start\n"
 	"	.type   _start,%function\n"
+#if defined(__thumb2__)
+	"	.thumb_func\n"
+#endif
+	"	.align 2\n"
 	"_start:\n"
 	/* We compute the parameters for __self_reloc:
 	   - r0 is a pointer to the loadmap (either from r8 or r7 if rtld is
@@ -25,12 +28,17 @@ __asm__(
 	   __self_reloc will fix indirect addresses in .rofixup
 	   section and will return the relocated GOT value.
 	*/
+#if defined(__thumb2__)
+	"	sub	r4, pc, #4\n"
+#else
 	"	sub	r4, pc, #8\n"
+#endif
 	"	ldr	r1, .L__ROFIXUP_LIST__\n"
 	"	add	r1, r1, r4\n"
 	"	ldr	r2, .L__ROFIXUP_END__\n"
 	"	add	r2, r2, r4\n"
 	"	movs	r0, r8\n"
+	"	it	eq\n"
 	"	moveq	r0, r7\n"
 	"	push	{r7, r8, r9, r10}\n"
 	"	bl	__self_reloc;\n"
diff --git a/ldso/ldso/arm/resolve.S b/ldso/ldso/arm/resolve.S
index 039a6b7..8013872 100644
--- a/ldso/ldso/arm/resolve.S
+++ b/ldso/ldso/arm/resolve.S
@@ -101,7 +101,15 @@
  .text
  .align 4      @ 16 byte boundary and there are 32 bytes below (arm case)
 #if 1 /*(!defined(__thumb__) || defined __THUMB_INTERWORK__) || defined(__thumb2__)*/
- .arm
+	/* On Thumb-only processors, force thumb encoding. These
+	processors support Thumb-2, so the same source code can be
+	used as in ARM mode. */
+#if !defined(__ARM_ARCH_ISA_ARM)
+	.thumb
+	.thumb_func
+#else
+	.arm
+#endif
  .hidden _dl_linux_resolve
  .globl _dl_linux_resolve
  .type _dl_linux_resolve,%function
diff --git a/libc/sysdeps/linux/arm/crt1.S b/libc/sysdeps/linux/arm/crt1.S
index 5da0fe1..a1d7f0f 100644
--- a/libc/sysdeps/linux/arm/crt1.S
+++ b/libc/sysdeps/linux/arm/crt1.S
@@ -97,12 +97,17 @@ ARM register quick reference:
 
 #if defined(__FDPIC__)
 .text
-	.arm
 	.globl	_start
+	.type	_start,%function
 
+	.align	2
 _start:
 	/* Start by self relocation.  */
+#if defined(__thumb2__)
+	sub r4, pc, #4
+#else
 	sub r4, pc, #8
+#endif
 	ldr r1, .L__ROFIXUP_LIST__
 	add r1, r1, r4
 	ldr r2, .L__ROFIXUP_END__
@@ -129,6 +134,7 @@ _start:
 	ldr r4, [r9, r4]
 	str r4, [sp, #0]		/* sp + 0 GOT fini  */
 	movs r4, r8			/* Test if static binary (r8 is 0 as there is no interpreter).  */
+	ite ne
 	movne r4, r10
 	moveq r4, #0
 	str r4, [sp, #4]		/* sp + 4 got rtld_fini  */
diff mbox series

Patch

diff --git a/ldso/ldso/arm/aeabi_read_tp.S b/ldso/ldso/arm/aeabi_read_tp.S
index 77e0d6e..5ab5125 100644
--- a/ldso/ldso/arm/aeabi_read_tp.S
+++ b/ldso/ldso/arm/aeabi_read_tp.S
@@ -53,9 +53,23 @@ 
 #else
 	.hidden __aeabi_read_tp
 #endif
+#if !defined(__ARM_ARCH_ISA_ARM)
+	.thumb_func
+	.thumb
+	.syntax unified
+	ENTRY (__aeabi_read_tp)
+	push	{r7}
+	mov	r7, #0x0f0000
+	orr	r7, r7, #6
+	svc	#0
+	pop	{r7}
+	bx	lr
+#else
+	.arm
 ENTRY (__aeabi_read_tp)
 	mov	r0, #0xffff0fff
 	sub	pc, r0, #31
+#endif
 END (__aeabi_read_tp)
 
 #endif /* __UCLIBC_HAS_THREADS_NATIVE__ */
diff --git a/ldso/ldso/arm/dl-startup.h b/ldso/ldso/arm/dl-startup.h
index 06c95cb..cacd461 100644
--- a/ldso/ldso/arm/dl-startup.h
+++ b/ldso/ldso/arm/dl-startup.h
@@ -11,10 +11,13 @@ 
 #if defined(__FDPIC__)
 #if !defined(__thumb__) || defined(__thumb2__)
 __asm__(
-	"	.arm\n"
 	"	.text\n"
 	"	.globl  _start\n"
 	"	.type   _start,%function\n"
+#if defined(__thumb2__)
+	"	.thumb_func\n"
+#endif
+	"	.align 2\n"
 	"_start:\n"
 	/* We compute the parameters for __self_reloc:
 	   - r0 is a pointer to the loadmap (either from r8 or r7 if rtld is
@@ -25,12 +28,17 @@  __asm__(
 	   __self_reloc will fix indirect addresses in .rofixup
 	   section and will return the relocated GOT value.
 	*/
+#if defined(__thumb2__)
+	"	sub	r4, pc, #4\n"
+#else
 	"	sub	r4, pc, #8\n"
+#endif
 	"	ldr	r1, .L__ROFIXUP_LIST__\n"
 	"	add	r1, r1, r4\n"
 	"	ldr	r2, .L__ROFIXUP_END__\n"
 	"	add	r2, r2, r4\n"
 	"	movs	r0, r8\n"
+	"	it	eq\n"
 	"	moveq	r0, r7\n"
 	"	push	{r7, r8, r9, r10}\n"
 	"	bl	__self_reloc;\n"
diff --git a/ldso/ldso/arm/resolve.S b/ldso/ldso/arm/resolve.S
index 039a6b7..8013872 100644
--- a/ldso/ldso/arm/resolve.S
+++ b/ldso/ldso/arm/resolve.S
@@ -101,7 +101,15 @@ 
  .text
  .align 4      @ 16 byte boundary and there are 32 bytes below (arm case)
 #if 1 /*(!defined(__thumb__) || defined __THUMB_INTERWORK__) || defined(__thumb2__)*/
- .arm
+	/* On Thumb-only processors, force thumb encoding. These
+	processors support Thumb-2, so the same source code can be
+	used as in ARM mode. */
+#if !defined(__ARM_ARCH_ISA_ARM)
+	.thumb
+	.thumb_func
+#else
+	.arm
+#endif
  .hidden _dl_linux_resolve
  .globl _dl_linux_resolve
  .type _dl_linux_resolve,%function
diff --git a/ldso/ldso/arm/thumb_atomics.S b/ldso/ldso/arm/thumb_atomics.S
index f88da2b..b0bc941 100644
--- a/ldso/ldso/arm/thumb_atomics.S
+++ b/ldso/ldso/arm/thumb_atomics.S
@@ -34,6 +34,8 @@ 
 
 #include <features.h>
 
+/* This code seems useless and doesn't compile for Cortex-M.  */
+#ifndef __FDPIC__
 #ifdef __UCLIBC_HAS_THREADS_NATIVE__
 
 #include <sysdep.h>
@@ -76,3 +78,4 @@  END (__thumb_cmpxchg)
 #endif /* __thumb__ */
 #endif /* __UCLIBC_HAS_THREADS_NATIVE__ */
 
+#endif /* __FDPIC__ */
diff --git a/libc/sysdeps/linux/arm/crt1.S b/libc/sysdeps/linux/arm/crt1.S
index 5da0fe1..a1d7f0f 100644
--- a/libc/sysdeps/linux/arm/crt1.S
+++ b/libc/sysdeps/linux/arm/crt1.S
@@ -97,12 +97,17 @@  ARM register quick reference:
 
 #if defined(__FDPIC__)
 .text
-	.arm
 	.globl	_start
+	.type	_start,%function
 
+	.align	2
 _start:
 	/* Start by self relocation.  */
+#if defined(__thumb2__)
+	sub r4, pc, #4
+#else
 	sub r4, pc, #8
+#endif
 	ldr r1, .L__ROFIXUP_LIST__
 	add r1, r1, r4
 	ldr r2, .L__ROFIXUP_END__
@@ -129,6 +134,7 @@  _start:
 	ldr r4, [r9, r4]
 	str r4, [sp, #0]		/* sp + 0 GOT fini  */
 	movs r4, r8			/* Test if static binary (r8 is 0 as there is no interpreter).  */
+	ite ne
 	movne r4, r10
 	moveq r4, #0
 	str r4, [sp, #4]		/* sp + 4 got rtld_fini  */