| Message ID | 20181019220743.15020-6-lukas.auer@aisec.fraunhofer.de |
|---|---|
| State | Superseded |
| Delegated to: | Andes |
| Headers | show |
| Series | General fixes / cleanup for RISC-V and improvements to qemu-riscv | expand |
On Sat, Oct 20, 2018 at 6:09 AM Lukas Auer <lukas.auer@aisec.fraunhofer.de> wrote: > > CONFIG_PHYS_64BIT should be enabled on RV64I systems. Select it. > > Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> > --- > > arch/riscv/Kconfig | 1 + > 1 file changed, 1 insertion(+) > Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
> > On Sat, Oct 20, 2018 at 6:09 AM Lukas Auer <lukas.auer@aisec.fraunhofer.de> > > wrote: > > > > > > CONFIG_PHYS_64BIT should be enabled on RV64I systems. Select it. > > > > > > Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> > > > --- > > > > > > arch/riscv/Kconfig | 1 + > > > 1 file changed, 1 insertion(+) > > > > > > > Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Rick Chen <rick@andestech.com>
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig index 7c76b4d664..b81e0d990a 100644 --- a/arch/riscv/Kconfig +++ b/arch/riscv/Kconfig @@ -32,6 +32,7 @@ config ARCH_RV32I config ARCH_RV64I bool "RV64I" select 64BIT + select PHYS_64BIT help Choose this option to target the RV64I base integer instruction set.
CONFIG_PHYS_64BIT should be enabled on RV64I systems. Select it. Signed-off-by: Lukas Auer <lukas.auer@aisec.fraunhofer.de> --- arch/riscv/Kconfig | 1 + 1 file changed, 1 insertion(+)