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[v5,03/14] target/mips: Add and integrate MXU decoding engine placeholder

Message ID 1539966828-20947-4-git-send-email-aleksandar.markovic@rt-rk.com
State New
Headers show
Series Add limited MXU instruction support | expand

Commit Message

Aleksandar Markovic Oct. 19, 2018, 4:33 p.m. UTC 
From: Aleksandar Markovic <amarkovic@wavecomp.com>

Provide the placeholder and add the invocation logic for MXU
decoding engine.

Signed-off-by: Aleksandar Markovic <amarkovic@wavecomp.com>
---
 target/mips/translate.c | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)
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Patch

diff --git a/target/mips/translate.c b/target/mips/translate.c
index ef7ad62..dc72f76 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -23311,6 +23311,12 @@  static void decode_opc_special(CPUMIPSState *env, DisasContext *ctx)
     }
 }
 
+static void decode_opc_mxu(CPUMIPSState *env, DisasContext *ctx)
+{
+    MIPS_INVAL("decode_opc_mxu");
+    generate_exception_end(ctx, EXCP_RI);
+}
+
 static void decode_opc_special2_legacy(CPUMIPSState *env, DisasContext *ctx)
 {
     int rs, rt, rd;
@@ -25292,7 +25298,11 @@  static void decode_opc(CPUMIPSState *env, DisasContext *ctx)
         decode_opc_special(env, ctx);
         break;
     case OPC_SPECIAL2:
-        decode_opc_special2_legacy(env, ctx);
+        if (ctx->insn_flags & ASE_MXU) {
+            decode_opc_mxu(env, ctx);
+        } else {
+            decode_opc_special2_legacy(env, ctx);
+        }
         break;
     case OPC_SPECIAL3:
         decode_opc_special3(env, ctx);