| Message ID | 20181019010625.25294-52-cota@braap.org |
|---|---|
| State | New |
| Headers | show |
| Series | per-CPU locks | expand |
On Thu, 18 Oct 2018 18:06:20 PDT (-0700), cota@braap.org wrote: > Soon we will call cpu_has_work without the BQL. > > Cc: Michael Clark <mjc@sifive.com> > Cc: Palmer Dabbelt <palmer@sifive.com> > Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> > Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> > Signed-off-by: Emilio G. Cota <cota@braap.org> > --- > target/riscv/cpu.c | 21 ++++++++++++++++++++- > 1 file changed, 20 insertions(+), 1 deletion(-) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index d630e8fd6c..b10995c807 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -18,6 +18,7 @@ > */ > > #include "qemu/osdep.h" > +#include "qemu/main-loop.h" > #include "qemu/log.h" > #include "cpu.h" > #include "exec/exec-all.h" > @@ -244,11 +245,14 @@ static void riscv_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb) > env->pc = tb->pc; > } > > -static bool riscv_cpu_has_work(CPUState *cs) > +static bool riscv_cpu_has_work_locked(CPUState *cs) > { > #ifndef CONFIG_USER_ONLY > RISCVCPU *cpu = RISCV_CPU(cs); > CPURISCVState *env = &cpu->env; > + > + g_assert(qemu_mutex_iothread_locked()); > + > /* > * Definition of the WFI instruction requires it to ignore the privilege > * mode and delegation registers, but respect individual enables > @@ -259,6 +263,21 @@ static bool riscv_cpu_has_work(CPUState *cs) > #endif > } > > +static bool riscv_cpu_has_work(CPUState *cs) > +{ > + if (!qemu_mutex_iothread_locked()) { > + bool ret; > + > + cpu_mutex_unlock(cs); > + qemu_mutex_lock_iothread(); > + cpu_mutex_lock(cs); > + ret = riscv_cpu_has_work_locked(cs); > + qemu_mutex_unlock_iothread(); > + return ret; > + } > + return riscv_cpu_has_work_locked(cs); > +} > + > void restore_state_to_opc(CPURISCVState *env, TranslationBlock *tb, > target_ulong *data) > { I'm afraid I don't understand the locking scheme, but as far as the RISC-V stuff goes this looks fine. Reviewed-by: Palmer Dabbelt <palmer@sifive.com> Thanks!
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d630e8fd6c..b10995c807 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -18,6 +18,7 @@ */ #include "qemu/osdep.h" +#include "qemu/main-loop.h" #include "qemu/log.h" #include "cpu.h" #include "exec/exec-all.h" @@ -244,11 +245,14 @@ static void riscv_cpu_synchronize_from_tb(CPUState *cs, TranslationBlock *tb) env->pc = tb->pc; } -static bool riscv_cpu_has_work(CPUState *cs) +static bool riscv_cpu_has_work_locked(CPUState *cs) { #ifndef CONFIG_USER_ONLY RISCVCPU *cpu = RISCV_CPU(cs); CPURISCVState *env = &cpu->env; + + g_assert(qemu_mutex_iothread_locked()); + /* * Definition of the WFI instruction requires it to ignore the privilege * mode and delegation registers, but respect individual enables @@ -259,6 +263,21 @@ static bool riscv_cpu_has_work(CPUState *cs) #endif } +static bool riscv_cpu_has_work(CPUState *cs) +{ + if (!qemu_mutex_iothread_locked()) { + bool ret; + + cpu_mutex_unlock(cs); + qemu_mutex_lock_iothread(); + cpu_mutex_lock(cs); + ret = riscv_cpu_has_work_locked(cs); + qemu_mutex_unlock_iothread(); + return ret; + } + return riscv_cpu_has_work_locked(cs); +} + void restore_state_to_opc(CPURISCVState *env, TranslationBlock *tb, target_ulong *data) {
Soon we will call cpu_has_work without the BQL. Cc: Michael Clark <mjc@sifive.com> Cc: Palmer Dabbelt <palmer@sifive.com> Cc: Sagar Karandikar <sagark@eecs.berkeley.edu> Cc: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Emilio G. Cota <cota@braap.org> --- target/riscv/cpu.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-)