| Message ID | 20181017050932.11138-4-anarsoul@gmail.com |
|---|---|
| State | Superseded |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
| Series | Add support for Pinebook | expand |
On Tuesday, October 16, 2018 10:09:30 PM PDT Vasily Khoruzhick wrote: > Updates the device tree file from the the Linux tree as of v4.19-rc4, > exactly Linux commit: > > commit 7876320f8880 (tag: v4.19-rc4) > Author: Linus Torvalds <torvalds@linux-foundation.org> > Date: Sun Sep 16 11:52:37 2018 -0700 > > Linux 4.19-rc4 > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> +CC Jernej > --- > arch/arm/dts/sun50i-a64.dtsi | 122 +++++++++++++++++++++++++++++------ > 1 file changed, 103 insertions(+), 19 deletions(-) > > diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi > index 7a083637c4..d3daf90a87 100644 > --- a/arch/arm/dts/sun50i-a64.dtsi > +++ b/arch/arm/dts/sun50i-a64.dtsi > @@ -43,9 +43,12 @@ > */ > > #include <dt-bindings/clock/sun50i-a64-ccu.h> > +#include <dt-bindings/clock/sun8i-de2.h> > #include <dt-bindings/clock/sun8i-r-ccu.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/reset/sun50i-a64-ccu.h> > +#include <dt-bindings/reset/sun8i-de2.h> > +#include <dt-bindings/reset/sun8i-r-ccu.h> > > / { > interrupt-parent = <&gic>; > @@ -57,17 +60,21 @@ > #size-cells = <1>; > ranges; > > -/* > - * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU. > - * However there is no support for this clock on A64 yet, so we depend > - * on the upstream clocks here to keep them (and thus CLK_MIXER0) up. > - */ > simplefb_lcd: framebuffer-lcd { > compatible = "allwinner,simple-framebuffer", > "simple-framebuffer"; > allwinner,pipeline = "mixer0-lcd0"; > clocks = <&ccu CLK_TCON0>, > - <&ccu CLK_DE>, <&ccu CLK_BUS_DE>; > + <&display_clocks CLK_MIXER0>; > + status = "disabled"; > + }; > + > + simplefb_hdmi: framebuffer-hdmi { > + compatible = "allwinner,simple-framebuffer", > + "simple-framebuffer"; > + allwinner,pipeline = "mixer1-lcd1-hdmi"; > + clocks = <&display_clocks CLK_MIXER1>, > + <&ccu CLK_TCON1>, <&ccu CLK_HDMI>; > status = "disabled"; > }; > }; > @@ -168,10 +175,46 @@ > #size-cells = <1>; > ranges; > > + de2@1000000 { > + compatible = "allwinner,sun50i-a64-de2"; > + reg = <0x1000000 0x400000>; > + allwinner,sram = <&de2_sram 1>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x1000000 0x400000>; > + > + display_clocks: clock@0 { > + compatible = "allwinner,sun50i-a64-de2-clk"; > + reg = <0x0 0x100000>; > + clocks = <&ccu CLK_DE>, > + <&ccu CLK_BUS_DE>; > + clock-names = "mod", > + "bus"; > + resets = <&ccu RST_BUS_DE>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + }; > + > syscon: syscon@1c00000 { > - compatible = "allwinner,sun50i-a64-system-controller", > - "syscon"; > + compatible = "allwinner,sun50i-a64-system-control"; > reg = <0x01c00000 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + sram_c: sram@18000 { > + compatible = "mmio-sram"; > + reg = <0x00018000 0x28000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x00018000 0x28000>; > + > + de2_sram: sram-section@0 { > + compatible = "allwinner,sun50i-a64-sram-c"; > + reg = <0x0000 0x28000>; > + }; > + }; > }; > > dma: dma-controller@1c02000 { > @@ -364,6 +407,11 @@ > bias-pull-up; > }; > > + pwm_pin: pwm_pin { > + pins = "PD22"; > + function = "pwm"; > + }; > + > rmii_pins: rmii_pins { > pins = "PD10", "PD11", "PD13", "PD14", "PD17", > "PD18", "PD19", "PD20", "PD22", "PD23"; > @@ -474,15 +522,6 @@ > status = "disabled"; > }; > > - pwm: pwm@1c21400 { > - compatible = "allwinner,sun50i-a64-pwm", > - "allwinner,sun5i-a13-pwm"; > - reg = <0x01c21400 0x8>; > - clocks = <&osc24M>; > - #pwm-cells = <3>; > - status = "disabled"; > - }; > - > uart0: serial@1c28000 { > compatible = "snps,dw-apb-uart"; > reg = <0x01c28000 0x400>; > @@ -617,8 +656,6 @@ > clocks = <&ccu CLK_BUS_EMAC>; > clock-names = "stmmaceth"; > status = "disabled"; > - #address-cells = <1>; > - #size-cells = <0>; > > mdio: mdio { > compatible = "snps,dwmac-mdio"; > @@ -638,11 +675,25 @@ > #interrupt-cells = <3>; > }; > > + pwm: pwm@1c21400 { > + compatible = "allwinner,sun50i-a64-pwm", > + "allwinner,sun5i-a13-pwm"; > + reg = <0x01c21400 0x400>; > + clocks = <&osc24M>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pwm_pin>; > + #pwm-cells = <3>; > + status = "disabled"; > + }; > + > rtc: rtc@1f00000 { > compatible = "allwinner,sun6i-a31-rtc"; > reg = <0x01f00000 0x54>; > interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, > <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; > + clock-output-names = "rtc-osc32k", "rtc-osc32k-out"; > + clocks = <&osc32k>; > + #clock-cells = <1>; > }; > > r_intc: interrupt-controller@1f00c00 { > @@ -664,6 +715,29 @@ > #reset-cells = <1>; > }; > > + r_i2c: i2c@1f02400 { > + compatible = "allwinner,sun50i-a64-i2c", > + "allwinner,sun6i-a31-i2c"; > + reg = <0x01f02400 0x400>; > + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&r_ccu CLK_APB0_I2C>; > + resets = <&r_ccu RST_APB0_I2C>; > + status = "disabled"; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + r_pwm: pwm@1f03800 { > + compatible = "allwinner,sun50i-a64-pwm", > + "allwinner,sun5i-a13-pwm"; > + reg = <0x01f03800 0x400>; > + clocks = <&osc24M>; > + pinctrl-names = "default"; > + pinctrl-0 = <&r_pwm_pin>; > + #pwm-cells = <3>; > + status = "disabled"; > + }; > + > r_pio: pinctrl@1f02c00 { > compatible = "allwinner,sun50i-a64-r-pinctrl"; > reg = <0x01f02c00 0x400>; > @@ -675,6 +749,16 @@ > interrupt-controller; > #interrupt-cells = <3>; > > + r_i2c_pins_a: i2c-a { > + pins = "PL8", "PL9"; > + function = "s_i2c"; > + }; > + > + r_pwm_pin: pwm { > + pins = "PL10"; > + function = "s_pwm"; > + }; > + > r_rsb_pins: rsb { > pins = "PL0", "PL1"; > function = "s_rsb";
Hi, Dne sreda, 17. oktober 2018 ob 17:03:23 CEST je Vasily Khoruzhick napisal(a): > On Tuesday, October 16, 2018 10:09:30 PM PDT Vasily Khoruzhick wrote: > > Updates the device tree file from the the Linux tree as of v4.19-rc4, > > exactly Linux commit: > > > > commit 7876320f8880 (tag: v4.19-rc4) > > Author: Linus Torvalds <torvalds@linux-foundation.org> > > Date: Sun Sep 16 11:52:37 2018 -0700 > > > > Linux 4.19-rc4 > > > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> Wouldn't be best to use latest version from linux-next? Best regards, Jernej > > +CC Jernej > > > --- > > > > arch/arm/dts/sun50i-a64.dtsi | 122 +++++++++++++++++++++++++++++------ > > 1 file changed, 103 insertions(+), 19 deletions(-) > > > > diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi > > index 7a083637c4..d3daf90a87 100644 > > --- a/arch/arm/dts/sun50i-a64.dtsi > > +++ b/arch/arm/dts/sun50i-a64.dtsi > > @@ -43,9 +43,12 @@ > > > > */ > > > > #include <dt-bindings/clock/sun50i-a64-ccu.h> > > > > +#include <dt-bindings/clock/sun8i-de2.h> > > > > #include <dt-bindings/clock/sun8i-r-ccu.h> > > #include <dt-bindings/interrupt-controller/arm-gic.h> > > #include <dt-bindings/reset/sun50i-a64-ccu.h> > > > > +#include <dt-bindings/reset/sun8i-de2.h> > > +#include <dt-bindings/reset/sun8i-r-ccu.h> > > > > / { > > > > interrupt-parent = <&gic>; > > > > @@ -57,17 +60,21 @@ > > > > #size-cells = <1>; > > ranges; > > > > -/* > > - * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU. > > - * However there is no support for this clock on A64 yet, so we depend > > - * on the upstream clocks here to keep them (and thus CLK_MIXER0) up. > > - */ > > > > simplefb_lcd: framebuffer-lcd { > > > > compatible = "allwinner,simple-framebuffer", > > > > "simple-framebuffer"; > > > > allwinner,pipeline = "mixer0-lcd0"; > > clocks = <&ccu CLK_TCON0>, > > > > - <&ccu CLK_DE>, <&ccu CLK_BUS_DE>; > > + <&display_clocks CLK_MIXER0>; > > + status = "disabled"; > > + }; > > + > > + simplefb_hdmi: framebuffer-hdmi { > > + compatible = "allwinner,simple-framebuffer", > > + "simple-framebuffer"; > > + allwinner,pipeline = "mixer1-lcd1-hdmi"; > > + clocks = <&display_clocks CLK_MIXER1>, > > + <&ccu CLK_TCON1>, <&ccu CLK_HDMI>; > > > > status = "disabled"; > > > > }; > > > > }; > > > > @@ -168,10 +175,46 @@ > > > > #size-cells = <1>; > > ranges; > > > > + de2@1000000 { > > + compatible = "allwinner,sun50i-a64-de2"; > > + reg = <0x1000000 0x400000>; > > + allwinner,sram = <&de2_sram 1>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0 0x1000000 0x400000>; > > + > > + display_clocks: clock@0 { > > + compatible = "allwinner,sun50i-a64-de2-clk"; > > + reg = <0x0 0x100000>; > > + clocks = <&ccu CLK_DE>, > > + <&ccu CLK_BUS_DE>; > > + clock-names = "mod", > > + "bus"; > > + resets = <&ccu RST_BUS_DE>; > > + #clock-cells = <1>; > > + #reset-cells = <1>; > > + }; > > + }; > > + > > > > syscon: syscon@1c00000 { > > > > - compatible = "allwinner,sun50i-a64-system-controller", > > - "syscon"; > > + compatible = "allwinner,sun50i-a64-system-control"; > > > > reg = <0x01c00000 0x1000>; > > > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges; > > + > > + sram_c: sram@18000 { > > + compatible = "mmio-sram"; > > + reg = <0x00018000 0x28000>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0 0x00018000 0x28000>; > > + > > + de2_sram: sram-section@0 { > > + compatible = "allwinner,sun50i-a64-sram-c"; > > + reg = <0x0000 0x28000>; > > + }; > > + }; > > > > }; > > > > dma: dma-controller@1c02000 { > > > > @@ -364,6 +407,11 @@ > > > > bias-pull-up; > > > > }; > > > > + pwm_pin: pwm_pin { > > + pins = "PD22"; > > + function = "pwm"; > > + }; > > + > > > > rmii_pins: rmii_pins { > > > > pins = "PD10", "PD11", "PD13", "PD14", "PD17", > > > > "PD18", "PD19", "PD20", "PD22", "PD23"; > > > > @@ -474,15 +522,6 @@ > > > > status = "disabled"; > > > > }; > > > > - pwm: pwm@1c21400 { > > - compatible = "allwinner,sun50i-a64-pwm", > > - "allwinner,sun5i-a13-pwm"; > > - reg = <0x01c21400 0x8>; > > - clocks = <&osc24M>; > > - #pwm-cells = <3>; > > - status = "disabled"; > > - }; > > - > > > > uart0: serial@1c28000 { > > > > compatible = "snps,dw-apb-uart"; > > reg = <0x01c28000 0x400>; > > > > @@ -617,8 +656,6 @@ > > > > clocks = <&ccu CLK_BUS_EMAC>; > > clock-names = "stmmaceth"; > > status = "disabled"; > > > > - #address-cells = <1>; > > - #size-cells = <0>; > > > > mdio: mdio { > > > > compatible = "snps,dwmac-mdio"; > > > > @@ -638,11 +675,25 @@ > > > > #interrupt-cells = <3>; > > > > }; > > > > + pwm: pwm@1c21400 { > > + compatible = "allwinner,sun50i-a64-pwm", > > + "allwinner,sun5i-a13-pwm"; > > + reg = <0x01c21400 0x400>; > > + clocks = <&osc24M>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pwm_pin>; > > + #pwm-cells = <3>; > > + status = "disabled"; > > + }; > > + > > > > rtc: rtc@1f00000 { > > > > compatible = "allwinner,sun6i-a31-rtc"; > > reg = <0x01f00000 0x54>; > > interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, > > > > <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; > > > > + clock-output-names = "rtc-osc32k", "rtc-osc32k-out"; > > + clocks = <&osc32k>; > > + #clock-cells = <1>; > > > > }; > > > > r_intc: interrupt-controller@1f00c00 { > > > > @@ -664,6 +715,29 @@ > > > > #reset-cells = <1>; > > > > }; > > > > + r_i2c: i2c@1f02400 { > > + compatible = "allwinner,sun50i-a64-i2c", > > + "allwinner,sun6i-a31-i2c"; > > + reg = <0x01f02400 0x400>; > > + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&r_ccu CLK_APB0_I2C>; > > + resets = <&r_ccu RST_APB0_I2C>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + r_pwm: pwm@1f03800 { > > + compatible = "allwinner,sun50i-a64-pwm", > > + "allwinner,sun5i-a13-pwm"; > > + reg = <0x01f03800 0x400>; > > + clocks = <&osc24M>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&r_pwm_pin>; > > + #pwm-cells = <3>; > > + status = "disabled"; > > + }; > > + > > > > r_pio: pinctrl@1f02c00 { > > > > compatible = "allwinner,sun50i-a64-r-pinctrl"; > > reg = <0x01f02c00 0x400>; > > > > @@ -675,6 +749,16 @@ > > > > interrupt-controller; > > #interrupt-cells = <3>; > > > > + r_i2c_pins_a: i2c-a { > > + pins = "PL8", "PL9"; > > + function = "s_i2c"; > > + }; > > + > > + r_pwm_pin: pwm { > > + pins = "PL10"; > > + function = "s_pwm"; > > + }; > > + > > > > r_rsb_pins: rsb { > > > > pins = "PL0", "PL1"; > > function = "s_rsb";
On Tue, 16 Oct 2018 22:09:30 -0700 Vasily Khoruzhick <anarsoul@gmail.com> wrote: Hi, > Updates the device tree file from the the Linux tree as of v4.19-rc4, > exactly Linux commit: Does this work easily without syncing the .dts files as well? > commit 7876320f8880 (tag: v4.19-rc4) > Author: Linus Torvalds <torvalds@linux-foundation.org> > Date: Sun Sep 16 11:52:37 2018 -0700 > > Linux 4.19-rc4 So this sounds like the right thing to do, but in this particular case breaks Ethernet with UEFI booting in all distribution installers or kernels out there (except >= Linux 4.19-rc1). I consider this a major use case of U-Boot's DTB, so what do we do about this? The reason is that we dropped the "syscon" compatible string at the end of the system-controller node, which older kernels rely on to find the syscon node. I suggested to re-add this[1], but didn't have much success, unfortunately. The easiest would be to re-add (or not remove) "syscon" for U-Boot's copy, but this would mean a deviation from the Linux DT's. I am fine with this, but would like to hear more opinions. Cheers, Andre. [1] http://lists.infradead.org/pipermail/linux-arm-kernel/2018-September/602153.html > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > --- > arch/arm/dts/sun50i-a64.dtsi | 122 > +++++++++++++++++++++++++++++------ 1 file changed, 103 > insertions(+), 19 deletions(-) > > diff --git a/arch/arm/dts/sun50i-a64.dtsi > b/arch/arm/dts/sun50i-a64.dtsi index 7a083637c4..d3daf90a87 100644 > --- a/arch/arm/dts/sun50i-a64.dtsi > +++ b/arch/arm/dts/sun50i-a64.dtsi > @@ -43,9 +43,12 @@ > */ > > #include <dt-bindings/clock/sun50i-a64-ccu.h> > +#include <dt-bindings/clock/sun8i-de2.h> > #include <dt-bindings/clock/sun8i-r-ccu.h> > #include <dt-bindings/interrupt-controller/arm-gic.h> > #include <dt-bindings/reset/sun50i-a64-ccu.h> > +#include <dt-bindings/reset/sun8i-de2.h> > +#include <dt-bindings/reset/sun8i-r-ccu.h> > > / { > interrupt-parent = <&gic>; > @@ -57,17 +60,21 @@ > #size-cells = <1>; > ranges; > > -/* > - * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU. > - * However there is no support for this clock on A64 yet, so we > depend > - * on the upstream clocks here to keep them (and thus CLK_MIXER0) up. > - */ > simplefb_lcd: framebuffer-lcd { > compatible = "allwinner,simple-framebuffer", > "simple-framebuffer"; > allwinner,pipeline = "mixer0-lcd0"; > clocks = <&ccu CLK_TCON0>, > - <&ccu CLK_DE>, <&ccu CLK_BUS_DE>; > + <&display_clocks CLK_MIXER0>; > + status = "disabled"; > + }; > + > + simplefb_hdmi: framebuffer-hdmi { > + compatible = "allwinner,simple-framebuffer", > + "simple-framebuffer"; > + allwinner,pipeline = "mixer1-lcd1-hdmi"; > + clocks = <&display_clocks CLK_MIXER1>, > + <&ccu CLK_TCON1>, <&ccu CLK_HDMI>; > status = "disabled"; > }; > }; > @@ -168,10 +175,46 @@ > #size-cells = <1>; > ranges; > > + de2@1000000 { > + compatible = "allwinner,sun50i-a64-de2"; > + reg = <0x1000000 0x400000>; > + allwinner,sram = <&de2_sram 1>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x1000000 0x400000>; > + > + display_clocks: clock@0 { > + compatible = > "allwinner,sun50i-a64-de2-clk"; > + reg = <0x0 0x100000>; > + clocks = <&ccu CLK_DE>, > + <&ccu CLK_BUS_DE>; > + clock-names = "mod", > + "bus"; > + resets = <&ccu RST_BUS_DE>; > + #clock-cells = <1>; > + #reset-cells = <1>; > + }; > + }; > + > syscon: syscon@1c00000 { > - compatible = > "allwinner,sun50i-a64-system-controller", > - "syscon"; > + compatible = > "allwinner,sun50i-a64-system-control"; reg = <0x01c00000 0x1000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges; > + > + sram_c: sram@18000 { > + compatible = "mmio-sram"; > + reg = <0x00018000 0x28000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x00018000 0x28000>; > + > + de2_sram: sram-section@0 { > + compatible = > "allwinner,sun50i-a64-sram-c"; > + reg = <0x0000 0x28000>; > + }; > + }; > }; > > dma: dma-controller@1c02000 { > @@ -364,6 +407,11 @@ > bias-pull-up; > }; > > + pwm_pin: pwm_pin { > + pins = "PD22"; > + function = "pwm"; > + }; > + > rmii_pins: rmii_pins { > pins = "PD10", "PD11", "PD13", > "PD14", "PD17", "PD18", "PD19", "PD20", "PD22", "PD23"; > @@ -474,15 +522,6 @@ > status = "disabled"; > }; > > - pwm: pwm@1c21400 { > - compatible = "allwinner,sun50i-a64-pwm", > - "allwinner,sun5i-a13-pwm"; > - reg = <0x01c21400 0x8>; > - clocks = <&osc24M>; > - #pwm-cells = <3>; > - status = "disabled"; > - }; > - > uart0: serial@1c28000 { > compatible = "snps,dw-apb-uart"; > reg = <0x01c28000 0x400>; > @@ -617,8 +656,6 @@ > clocks = <&ccu CLK_BUS_EMAC>; > clock-names = "stmmaceth"; > status = "disabled"; > - #address-cells = <1>; > - #size-cells = <0>; > > mdio: mdio { > compatible = "snps,dwmac-mdio"; > @@ -638,11 +675,25 @@ > #interrupt-cells = <3>; > }; > > + pwm: pwm@1c21400 { > + compatible = "allwinner,sun50i-a64-pwm", > + "allwinner,sun5i-a13-pwm"; > + reg = <0x01c21400 0x400>; > + clocks = <&osc24M>; > + pinctrl-names = "default"; > + pinctrl-0 = <&pwm_pin>; > + #pwm-cells = <3>; > + status = "disabled"; > + }; > + > rtc: rtc@1f00000 { > compatible = "allwinner,sun6i-a31-rtc"; > reg = <0x01f00000 0x54>; > interrupts = <GIC_SPI 40 > IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; > + clock-output-names = "rtc-osc32k", > "rtc-osc32k-out"; > + clocks = <&osc32k>; > + #clock-cells = <1>; > }; > > r_intc: interrupt-controller@1f00c00 { > @@ -664,6 +715,29 @@ > #reset-cells = <1>; > }; > > + r_i2c: i2c@1f02400 { > + compatible = "allwinner,sun50i-a64-i2c", > + "allwinner,sun6i-a31-i2c"; > + reg = <0x01f02400 0x400>; > + interrupts = <GIC_SPI 44 > IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&r_ccu CLK_APB0_I2C>; > + resets = <&r_ccu RST_APB0_I2C>; > + status = "disabled"; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + > + r_pwm: pwm@1f03800 { > + compatible = "allwinner,sun50i-a64-pwm", > + "allwinner,sun5i-a13-pwm"; > + reg = <0x01f03800 0x400>; > + clocks = <&osc24M>; > + pinctrl-names = "default"; > + pinctrl-0 = <&r_pwm_pin>; > + #pwm-cells = <3>; > + status = "disabled"; > + }; > + > r_pio: pinctrl@1f02c00 { > compatible = > "allwinner,sun50i-a64-r-pinctrl"; reg = <0x01f02c00 0x400>; > @@ -675,6 +749,16 @@ > interrupt-controller; > #interrupt-cells = <3>; > > + r_i2c_pins_a: i2c-a { > + pins = "PL8", "PL9"; > + function = "s_i2c"; > + }; > + > + r_pwm_pin: pwm { > + pins = "PL10"; > + function = "s_pwm"; > + }; > + > r_rsb_pins: rsb { > pins = "PL0", "PL1"; > function = "s_rsb";
On Wed, Oct 17, 2018 at 04:18:41PM +0100, Andre Przywara wrote: > On Tue, 16 Oct 2018 22:09:30 -0700 > Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > Hi, > > > Updates the device tree file from the the Linux tree as of v4.19-rc4, > > exactly Linux commit: > > Does this work easily without syncing the .dts files as well? > > > commit 7876320f8880 (tag: v4.19-rc4) > > Author: Linus Torvalds <torvalds@linux-foundation.org> > > Date: Sun Sep 16 11:52:37 2018 -0700 > > > > Linux 4.19-rc4 > > So this sounds like the right thing to do, but in this particular case > breaks Ethernet with UEFI booting in all distribution installers or > kernels out there (except >= Linux 4.19-rc1). > I consider this a major use case of U-Boot's DTB, so what do we do > about this? > The reason is that we dropped the "syscon" compatible string at the end > of the system-controller node, which older kernels rely on to find the > syscon node. > I suggested to re-add this[1], but didn't have much success, > unfortunately. > The easiest would be to re-add (or not remove) "syscon" for U-Boot's > copy, but this would mean a deviation from the Linux DT's. I am fine > with this, but would like to hear more opinions. tl; dr: You want to build something robust on top of assumptions that have never been guaranteed. I'm fine with having it as a U-Boot addition, if it's what it takes. Maxime
On Wednesday, October 17, 2018 8:18:41 AM PDT Andre Przywara wrote: > On Tue, 16 Oct 2018 22:09:30 -0700 > Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > Hi, > > > Updates the device tree file from the the Linux tree as of v4.19-rc4, > > > exactly Linux commit: > Does this work easily without syncing the .dts files as well? Well, we need r_i2c node from upstream. Jernej also wants HDMI nodes. Easiest way to do that is to sync this file. > > > commit 7876320f8880 (tag: v4.19-rc4) > > Author: Linus Torvalds <torvalds@linux-foundation.org> > > Date: Sun Sep 16 11:52:37 2018 -0700 > > > > Linux 4.19-rc4 > > So this sounds like the right thing to do, but in this particular case > breaks Ethernet with UEFI booting in all distribution installers or > kernels out there (except >= Linux 4.19-rc1). > I consider this a major use case of U-Boot's DTB, so what do we do > about this? > The reason is that we dropped the "syscon" compatible string at the end > of the system-controller node, which older kernels rely on to find the > syscon node. > I suggested to re-add this[1], but didn't have much success, > unfortunately. > The easiest would be to re-add (or not remove) "syscon" for U-Boot's > copy, but this would mean a deviation from the Linux DT's. I am fine > with this, but would like to hear more opinions. Can you do it with a separate patch once this one merges? I have no way to test UEFI and updating sun50i-a64.dtsi doesn't break anything for me. > Cheers, > Andre. > > [1] > http://lists.infradead.org/pipermail/linux-arm-kernel/2018-September/602153. > html > > Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> > > --- > > > > arch/arm/dts/sun50i-a64.dtsi | 122 > > > > +++++++++++++++++++++++++++++------ 1 file changed, 103 > > insertions(+), 19 deletions(-) > > > > diff --git a/arch/arm/dts/sun50i-a64.dtsi > > b/arch/arm/dts/sun50i-a64.dtsi index 7a083637c4..d3daf90a87 100644 > > --- a/arch/arm/dts/sun50i-a64.dtsi > > +++ b/arch/arm/dts/sun50i-a64.dtsi > > @@ -43,9 +43,12 @@ > > > > */ > > > > #include <dt-bindings/clock/sun50i-a64-ccu.h> > > > > +#include <dt-bindings/clock/sun8i-de2.h> > > > > #include <dt-bindings/clock/sun8i-r-ccu.h> > > #include <dt-bindings/interrupt-controller/arm-gic.h> > > #include <dt-bindings/reset/sun50i-a64-ccu.h> > > > > +#include <dt-bindings/reset/sun8i-de2.h> > > +#include <dt-bindings/reset/sun8i-r-ccu.h> > > > > / { > > > > interrupt-parent = <&gic>; > > > > @@ -57,17 +60,21 @@ > > > > #size-cells = <1>; > > ranges; > > > > -/* > > - * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU. > > - * However there is no support for this clock on A64 yet, so we > > depend > > - * on the upstream clocks here to keep them (and thus CLK_MIXER0) up. > > - */ > > > > simplefb_lcd: framebuffer-lcd { > > > > compatible = "allwinner,simple-framebuffer", > > > > "simple-framebuffer"; > > > > allwinner,pipeline = "mixer0-lcd0"; > > clocks = <&ccu CLK_TCON0>, > > > > - <&ccu CLK_DE>, <&ccu CLK_BUS_DE>; > > + <&display_clocks CLK_MIXER0>; > > + status = "disabled"; > > + }; > > + > > + simplefb_hdmi: framebuffer-hdmi { > > + compatible = "allwinner,simple-framebuffer", > > + "simple-framebuffer"; > > + allwinner,pipeline = "mixer1-lcd1-hdmi"; > > + clocks = <&display_clocks CLK_MIXER1>, > > + <&ccu CLK_TCON1>, <&ccu CLK_HDMI>; > > > > status = "disabled"; > > > > }; > > > > }; > > > > @@ -168,10 +175,46 @@ > > > > #size-cells = <1>; > > ranges; > > > > + de2@1000000 { > > + compatible = "allwinner,sun50i-a64-de2"; > > + reg = <0x1000000 0x400000>; > > + allwinner,sram = <&de2_sram 1>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0 0x1000000 0x400000>; > > + > > + display_clocks: clock@0 { > > + compatible = > > "allwinner,sun50i-a64-de2-clk"; > > + reg = <0x0 0x100000>; > > + clocks = <&ccu CLK_DE>, > > + <&ccu CLK_BUS_DE>; > > + clock-names = "mod", > > + "bus"; > > + resets = <&ccu RST_BUS_DE>; > > + #clock-cells = <1>; > > + #reset-cells = <1>; > > + }; > > + }; > > + > > > > syscon: syscon@1c00000 { > > > > - compatible = > > "allwinner,sun50i-a64-system-controller", > > - "syscon"; > > + compatible = > > "allwinner,sun50i-a64-system-control"; reg = <0x01c00000 0x1000>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges; > > + > > + sram_c: sram@18000 { > > + compatible = "mmio-sram"; > > + reg = <0x00018000 0x28000>; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0 0x00018000 0x28000>; > > + > > + de2_sram: sram-section@0 { > > + compatible = > > "allwinner,sun50i-a64-sram-c"; > > + reg = <0x0000 0x28000>; > > + }; > > + }; > > > > }; > > > > dma: dma-controller@1c02000 { > > > > @@ -364,6 +407,11 @@ > > > > bias-pull-up; > > > > }; > > > > + pwm_pin: pwm_pin { > > + pins = "PD22"; > > + function = "pwm"; > > + }; > > + > > > > rmii_pins: rmii_pins { > > > > pins = "PD10", "PD11", "PD13", > > > > "PD14", "PD17", "PD18", "PD19", "PD20", "PD22", "PD23"; > > @@ -474,15 +522,6 @@ > > > > status = "disabled"; > > > > }; > > > > - pwm: pwm@1c21400 { > > - compatible = "allwinner,sun50i-a64-pwm", > > - "allwinner,sun5i-a13-pwm"; > > - reg = <0x01c21400 0x8>; > > - clocks = <&osc24M>; > > - #pwm-cells = <3>; > > - status = "disabled"; > > - }; > > - > > > > uart0: serial@1c28000 { > > > > compatible = "snps,dw-apb-uart"; > > reg = <0x01c28000 0x400>; > > > > @@ -617,8 +656,6 @@ > > > > clocks = <&ccu CLK_BUS_EMAC>; > > clock-names = "stmmaceth"; > > status = "disabled"; > > > > - #address-cells = <1>; > > - #size-cells = <0>; > > > > mdio: mdio { > > > > compatible = "snps,dwmac-mdio"; > > > > @@ -638,11 +675,25 @@ > > > > #interrupt-cells = <3>; > > > > }; > > > > + pwm: pwm@1c21400 { > > + compatible = "allwinner,sun50i-a64-pwm", > > + "allwinner,sun5i-a13-pwm"; > > + reg = <0x01c21400 0x400>; > > + clocks = <&osc24M>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&pwm_pin>; > > + #pwm-cells = <3>; > > + status = "disabled"; > > + }; > > + > > > > rtc: rtc@1f00000 { > > > > compatible = "allwinner,sun6i-a31-rtc"; > > reg = <0x01f00000 0x54>; > > interrupts = <GIC_SPI 40 > > > > IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; > > + clock-output-names = "rtc-osc32k", > > "rtc-osc32k-out"; > > + clocks = <&osc32k>; > > + #clock-cells = <1>; > > > > }; > > > > r_intc: interrupt-controller@1f00c00 { > > > > @@ -664,6 +715,29 @@ > > > > #reset-cells = <1>; > > > > }; > > > > + r_i2c: i2c@1f02400 { > > + compatible = "allwinner,sun50i-a64-i2c", > > + "allwinner,sun6i-a31-i2c"; > > + reg = <0x01f02400 0x400>; > > + interrupts = <GIC_SPI 44 > > IRQ_TYPE_LEVEL_HIGH>; > > + clocks = <&r_ccu CLK_APB0_I2C>; > > + resets = <&r_ccu RST_APB0_I2C>; > > + status = "disabled"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + > > + r_pwm: pwm@1f03800 { > > + compatible = "allwinner,sun50i-a64-pwm", > > + "allwinner,sun5i-a13-pwm"; > > + reg = <0x01f03800 0x400>; > > + clocks = <&osc24M>; > > + pinctrl-names = "default"; > > + pinctrl-0 = <&r_pwm_pin>; > > + #pwm-cells = <3>; > > + status = "disabled"; > > + }; > > + > > > > r_pio: pinctrl@1f02c00 { > > > > compatible = > > > > "allwinner,sun50i-a64-r-pinctrl"; reg = <0x01f02c00 0x400>; > > @@ -675,6 +749,16 @@ > > > > interrupt-controller; > > #interrupt-cells = <3>; > > > > + r_i2c_pins_a: i2c-a { > > + pins = "PL8", "PL9"; > > + function = "s_i2c"; > > + }; > > + > > + r_pwm_pin: pwm { > > + pins = "PL10"; > > + function = "s_pwm"; > > + }; > > + > > > > r_rsb_pins: rsb { > > > > pins = "PL0", "PL1"; > > function = "s_rsb";
On Wed, 17 Oct 2018 17:29:58 +0200 Maxime Ripard <maxime.ripard@bootlin.com> wrote: Hi, > On Wed, Oct 17, 2018 at 04:18:41PM +0100, Andre Przywara wrote: > > On Tue, 16 Oct 2018 22:09:30 -0700 > > Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > > > Hi, > > > > > Updates the device tree file from the the Linux tree as of > > > v4.19-rc4, exactly Linux commit: > > > > Does this work easily without syncing the .dts files as well? > > > > > commit 7876320f8880 (tag: v4.19-rc4) > > > Author: Linus Torvalds <torvalds@linux-foundation.org> > > > Date: Sun Sep 16 11:52:37 2018 -0700 > > > > > > Linux 4.19-rc4 > > > > So this sounds like the right thing to do, but in this particular > > case breaks Ethernet with UEFI booting in all distribution > > installers or kernels out there (except >= Linux 4.19-rc1). > > I consider this a major use case of U-Boot's DTB, so what do we do > > about this? > > The reason is that we dropped the "syscon" compatible string at the > > end of the system-controller node, which older kernels rely on to > > find the syscon node. > > I suggested to re-add this[1], but didn't have much success, > > unfortunately. > > The easiest would be to re-add (or not remove) "syscon" for U-Boot's > > copy, but this would mean a deviation from the Linux DT's. I am fine > > with this, but would like to hear more opinions. > > tl; dr: You want to build something robust on top of assumptions that > have never been guaranteed. I just find it sad that "we do not guarantee" translates into "we actually don't even try". My understanding of your concern is that you can't rule this breakage out forever, which I can understand. But if it is possible to avoid breaking compatibility, I believe we should try this, on a case-by-case base. We have been pretty good so far (leaving alone the MMC regulator breakage in v4.15, but A64 support was quite basic before that anyway). > I'm fine with having it as a U-Boot > addition, if it's what it takes. Sounds good to me! Thanks! I will check what's the easiest path to get the 4.20 DTs into U-Boot, considering a stopover at the Pinebook DTs, and send patches ASAP. Cheers, Andre.
On Wed, Oct 17, 2018 at 9:54 AM Andre Przywara <andre.przywara@arm.com> wrote: > > On Wed, 17 Oct 2018 17:29:58 +0200 > Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > Hi, > > > On Wed, Oct 17, 2018 at 04:18:41PM +0100, Andre Przywara wrote: > > > On Tue, 16 Oct 2018 22:09:30 -0700 > > > Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > > > > > Hi, > > > > > > > Updates the device tree file from the the Linux tree as of > > > > v4.19-rc4, exactly Linux commit: > > > > > > Does this work easily without syncing the .dts files as well? > > > > > > > commit 7876320f8880 (tag: v4.19-rc4) > > > > Author: Linus Torvalds <torvalds@linux-foundation.org> > > > > Date: Sun Sep 16 11:52:37 2018 -0700 > > > > > > > > Linux 4.19-rc4 > > > > > > So this sounds like the right thing to do, but in this particular > > > case breaks Ethernet with UEFI booting in all distribution > > > installers or kernels out there (except >= Linux 4.19-rc1). > > > I consider this a major use case of U-Boot's DTB, so what do we do > > > about this? > > > The reason is that we dropped the "syscon" compatible string at the > > > end of the system-controller node, which older kernels rely on to > > > find the syscon node. > > > I suggested to re-add this[1], but didn't have much success, > > > unfortunately. > > > The easiest would be to re-add (or not remove) "syscon" for U-Boot's > > > copy, but this would mean a deviation from the Linux DT's. I am fine > > > with this, but would like to hear more opinions. > > > > tl; dr: You want to build something robust on top of assumptions that > > have never been guaranteed. > > I just find it sad that "we do not guarantee" translates into "we > actually don't even try". My understanding of your concern is that you > can't rule this breakage out forever, which I can understand. > But if it is possible to avoid breaking compatibility, I believe we > should try this, on a case-by-case base. > We have been pretty good so far (leaving alone the MMC regulator > breakage in v4.15, but A64 support was quite basic before that anyway). > > > I'm fine with having it as a U-Boot > > addition, if it's what it takes. > > Sounds good to me! Thanks! > > I will check what's the easiest path to get the 4.20 DTs into U-Boot, > considering a stopover at the Pinebook DTs, and send patches ASAP. So do you want me to wait for you to submit a patch that syncs sun50i-a64.dtsi? > > Cheers, > Andre.
On Wed, 17 Oct 2018 10:09:55 -0700 Vasily Khoruzhick <anarsoul@gmail.com> wrote: > On Wed, Oct 17, 2018 at 9:54 AM Andre Przywara > <andre.przywara@arm.com> wrote: > > > > On Wed, 17 Oct 2018 17:29:58 +0200 > > Maxime Ripard <maxime.ripard@bootlin.com> wrote: > > > > Hi, > > > > > On Wed, Oct 17, 2018 at 04:18:41PM +0100, Andre Przywara wrote: > > > > On Tue, 16 Oct 2018 22:09:30 -0700 > > > > Vasily Khoruzhick <anarsoul@gmail.com> wrote: > > > > > > > > Hi, > > > > > > > > > Updates the device tree file from the the Linux tree as of > > > > > v4.19-rc4, exactly Linux commit: > > > > > > > > Does this work easily without syncing the .dts files as well? > > > > > > > > > commit 7876320f8880 (tag: v4.19-rc4) > > > > > Author: Linus Torvalds <torvalds@linux-foundation.org> > > > > > Date: Sun Sep 16 11:52:37 2018 -0700 > > > > > > > > > > Linux 4.19-rc4 > > > > > > > > So this sounds like the right thing to do, but in this > > > > particular case breaks Ethernet with UEFI booting in all > > > > distribution installers or kernels out there (except >= Linux > > > > 4.19-rc1). I consider this a major use case of U-Boot's DTB, so > > > > what do we do about this? > > > > The reason is that we dropped the "syscon" compatible string at > > > > the end of the system-controller node, which older kernels rely > > > > on to find the syscon node. > > > > I suggested to re-add this[1], but didn't have much success, > > > > unfortunately. > > > > The easiest would be to re-add (or not remove) "syscon" for > > > > U-Boot's copy, but this would mean a deviation from the Linux > > > > DT's. I am fine with this, but would like to hear more > > > > opinions. > > > > > > tl; dr: You want to build something robust on top of assumptions > > > that have never been guaranteed. > > > > I just find it sad that "we do not guarantee" translates into "we > > actually don't even try". My understanding of your concern is that > > you can't rule this breakage out forever, which I can understand. > > But if it is possible to avoid breaking compatibility, I believe we > > should try this, on a case-by-case base. > > We have been pretty good so far (leaving alone the MMC regulator > > breakage in v4.15, but A64 support was quite basic before that > > anyway). > > > I'm fine with having it as a U-Boot > > > addition, if it's what it takes. > > > > Sounds good to me! Thanks! > > > > I will check what's the easiest path to get the 4.20 DTs into > > U-Boot, considering a stopover at the Pinebook DTs, and send > > patches ASAP. > > So do you want me to wait for you to submit a patch that syncs > sun50i-a64.dtsi? I will review the rest of your series later tonight and try to suggest something that's the easiest for you then. Cheers, Andre
On 10/17/18 4:40 PM, Vasily Khoruzhick wrote: > On Wednesday, October 17, 2018 8:18:41 AM PDT Andre Przywara wrote: >> On Tue, 16 Oct 2018 22:09:30 -0700 >> Vasily Khoruzhick <anarsoul@gmail.com> wrote: >> >> Hi, >> >>> Updates the device tree file from the the Linux tree as of v4.19-rc4, >> >>> exactly Linux commit: >> Does this work easily without syncing the .dts files as well? > > Well, we need r_i2c node from upstream. Jernej also wants HDMI nodes. > Easiest way to do that is to sync this file. I understand that, but sometimes we have changes in the .dtsi that require board .dts updates at the same time (the UART pins in 4.20, for instance). This one seems to be fine, though. >> >>> commit 7876320f8880 (tag: v4.19-rc4) >>> Author: Linus Torvalds <torvalds@linux-foundation.org> >>> Date: Sun Sep 16 11:52:37 2018 -0700 >>> >>> Linux 4.19-rc4 >> >> So this sounds like the right thing to do, but in this particular case >> breaks Ethernet with UEFI booting in all distribution installers or >> kernels out there (except >= Linux 4.19-rc1). >> I consider this a major use case of U-Boot's DTB, so what do we do >> about this? >> The reason is that we dropped the "syscon" compatible string at the end >> of the system-controller node, which older kernels rely on to find the >> syscon node. >> I suggested to re-add this[1], but didn't have much success, >> unfortunately. >> The easiest would be to re-add (or not remove) "syscon" for U-Boot's >> copy, but this would mean a deviation from the Linux DT's. I am fine >> with this, but would like to hear more opinions. > > Can you do it with a separate patch once this one merges? Yes, that seems like the easiest way. > I have no way to > test UEFI and updating sun50i-a64.dtsi doesn't break anything for me. You actually don't need to boot UEFI, just DON'T load some .dtb, instead pass on U-Boot's copy (this is what the automated UEFI boot does). => booti $kernel_addr_r - $fdtcontroladdr This way you can boot any kernel or distribution, without requiring it to ship your particular .dtb. And for installers: download some generic arm64 .iso image and "dd" this to a USB pen drive. Put that in a working USB socket and power on. The rest works automatically. Cheers, Andre. > >> Cheers, >> Andre. >> >> [1] >> http://lists.infradead.org/pipermail/linux-arm-kernel/2018-September/602153. >> html >>> Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> >>> --- >>> >>> arch/arm/dts/sun50i-a64.dtsi | 122 >>> >>> +++++++++++++++++++++++++++++------ 1 file changed, 103 >>> insertions(+), 19 deletions(-) >>> >>> diff --git a/arch/arm/dts/sun50i-a64.dtsi >>> b/arch/arm/dts/sun50i-a64.dtsi index 7a083637c4..d3daf90a87 100644 >>> --- a/arch/arm/dts/sun50i-a64.dtsi >>> +++ b/arch/arm/dts/sun50i-a64.dtsi >>> @@ -43,9 +43,12 @@ >>> >>> */ >>> >>> #include <dt-bindings/clock/sun50i-a64-ccu.h> >>> >>> +#include <dt-bindings/clock/sun8i-de2.h> >>> >>> #include <dt-bindings/clock/sun8i-r-ccu.h> >>> #include <dt-bindings/interrupt-controller/arm-gic.h> >>> #include <dt-bindings/reset/sun50i-a64-ccu.h> >>> >>> +#include <dt-bindings/reset/sun8i-de2.h> >>> +#include <dt-bindings/reset/sun8i-r-ccu.h> >>> >>> / { >>> >>> interrupt-parent = <&gic>; >>> >>> @@ -57,17 +60,21 @@ >>> >>> #size-cells = <1>; >>> ranges; >>> >>> -/* >>> - * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU. >>> - * However there is no support for this clock on A64 yet, so we >>> depend >>> - * on the upstream clocks here to keep them (and thus CLK_MIXER0) up. >>> - */ >>> >>> simplefb_lcd: framebuffer-lcd { >>> >>> compatible = "allwinner,simple-framebuffer", >>> >>> "simple-framebuffer"; >>> >>> allwinner,pipeline = "mixer0-lcd0"; >>> clocks = <&ccu CLK_TCON0>, >>> >>> - <&ccu CLK_DE>, <&ccu CLK_BUS_DE>; >>> + <&display_clocks CLK_MIXER0>; >>> + status = "disabled"; >>> + }; >>> + >>> + simplefb_hdmi: framebuffer-hdmi { >>> + compatible = "allwinner,simple-framebuffer", >>> + "simple-framebuffer"; >>> + allwinner,pipeline = "mixer1-lcd1-hdmi"; >>> + clocks = <&display_clocks CLK_MIXER1>, >>> + <&ccu CLK_TCON1>, <&ccu CLK_HDMI>; >>> >>> status = "disabled"; >>> >>> }; >>> >>> }; >>> >>> @@ -168,10 +175,46 @@ >>> >>> #size-cells = <1>; >>> ranges; >>> >>> + de2@1000000 { >>> + compatible = "allwinner,sun50i-a64-de2"; >>> + reg = <0x1000000 0x400000>; >>> + allwinner,sram = <&de2_sram 1>; >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + ranges = <0 0x1000000 0x400000>; >>> + >>> + display_clocks: clock@0 { >>> + compatible = >>> "allwinner,sun50i-a64-de2-clk"; >>> + reg = <0x0 0x100000>; >>> + clocks = <&ccu CLK_DE>, >>> + <&ccu CLK_BUS_DE>; >>> + clock-names = "mod", >>> + "bus"; >>> + resets = <&ccu RST_BUS_DE>; >>> + #clock-cells = <1>; >>> + #reset-cells = <1>; >>> + }; >>> + }; >>> + >>> >>> syscon: syscon@1c00000 { >>> >>> - compatible = >>> "allwinner,sun50i-a64-system-controller", >>> - "syscon"; >>> + compatible = >>> "allwinner,sun50i-a64-system-control"; reg = <0x01c00000 0x1000>; >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + ranges; >>> + >>> + sram_c: sram@18000 { >>> + compatible = "mmio-sram"; >>> + reg = <0x00018000 0x28000>; >>> + #address-cells = <1>; >>> + #size-cells = <1>; >>> + ranges = <0 0x00018000 0x28000>; >>> + >>> + de2_sram: sram-section@0 { >>> + compatible = >>> "allwinner,sun50i-a64-sram-c"; >>> + reg = <0x0000 0x28000>; >>> + }; >>> + }; >>> >>> }; >>> >>> dma: dma-controller@1c02000 { >>> >>> @@ -364,6 +407,11 @@ >>> >>> bias-pull-up; >>> >>> }; >>> >>> + pwm_pin: pwm_pin { >>> + pins = "PD22"; >>> + function = "pwm"; >>> + }; >>> + >>> >>> rmii_pins: rmii_pins { >>> >>> pins = "PD10", "PD11", "PD13", >>> >>> "PD14", "PD17", "PD18", "PD19", "PD20", "PD22", "PD23"; >>> @@ -474,15 +522,6 @@ >>> >>> status = "disabled"; >>> >>> }; >>> >>> - pwm: pwm@1c21400 { >>> - compatible = "allwinner,sun50i-a64-pwm", >>> - "allwinner,sun5i-a13-pwm"; >>> - reg = <0x01c21400 0x8>; >>> - clocks = <&osc24M>; >>> - #pwm-cells = <3>; >>> - status = "disabled"; >>> - }; >>> - >>> >>> uart0: serial@1c28000 { >>> >>> compatible = "snps,dw-apb-uart"; >>> reg = <0x01c28000 0x400>; >>> >>> @@ -617,8 +656,6 @@ >>> >>> clocks = <&ccu CLK_BUS_EMAC>; >>> clock-names = "stmmaceth"; >>> status = "disabled"; >>> >>> - #address-cells = <1>; >>> - #size-cells = <0>; >>> >>> mdio: mdio { >>> >>> compatible = "snps,dwmac-mdio"; >>> >>> @@ -638,11 +675,25 @@ >>> >>> #interrupt-cells = <3>; >>> >>> }; >>> >>> + pwm: pwm@1c21400 { >>> + compatible = "allwinner,sun50i-a64-pwm", >>> + "allwinner,sun5i-a13-pwm"; >>> + reg = <0x01c21400 0x400>; >>> + clocks = <&osc24M>; >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&pwm_pin>; >>> + #pwm-cells = <3>; >>> + status = "disabled"; >>> + }; >>> + >>> >>> rtc: rtc@1f00000 { >>> >>> compatible = "allwinner,sun6i-a31-rtc"; >>> reg = <0x01f00000 0x54>; >>> interrupts = <GIC_SPI 40 >>> >>> IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; >>> + clock-output-names = "rtc-osc32k", >>> "rtc-osc32k-out"; >>> + clocks = <&osc32k>; >>> + #clock-cells = <1>; >>> >>> }; >>> >>> r_intc: interrupt-controller@1f00c00 { >>> >>> @@ -664,6 +715,29 @@ >>> >>> #reset-cells = <1>; >>> >>> }; >>> >>> + r_i2c: i2c@1f02400 { >>> + compatible = "allwinner,sun50i-a64-i2c", >>> + "allwinner,sun6i-a31-i2c"; >>> + reg = <0x01f02400 0x400>; >>> + interrupts = <GIC_SPI 44 >>> IRQ_TYPE_LEVEL_HIGH>; >>> + clocks = <&r_ccu CLK_APB0_I2C>; >>> + resets = <&r_ccu RST_APB0_I2C>; >>> + status = "disabled"; >>> + #address-cells = <1>; >>> + #size-cells = <0>; >>> + }; >>> + >>> + r_pwm: pwm@1f03800 { >>> + compatible = "allwinner,sun50i-a64-pwm", >>> + "allwinner,sun5i-a13-pwm"; >>> + reg = <0x01f03800 0x400>; >>> + clocks = <&osc24M>; >>> + pinctrl-names = "default"; >>> + pinctrl-0 = <&r_pwm_pin>; >>> + #pwm-cells = <3>; >>> + status = "disabled"; >>> + }; >>> + >>> >>> r_pio: pinctrl@1f02c00 { >>> >>> compatible = >>> >>> "allwinner,sun50i-a64-r-pinctrl"; reg = <0x01f02c00 0x400>; >>> @@ -675,6 +749,16 @@ >>> >>> interrupt-controller; >>> #interrupt-cells = <3>; >>> >>> + r_i2c_pins_a: i2c-a { >>> + pins = "PL8", "PL9"; >>> + function = "s_i2c"; >>> + }; >>> + >>> + r_pwm_pin: pwm { >>> + pins = "PL10"; >>> + function = "s_pwm"; >>> + }; >>> + >>> >>> r_rsb_pins: rsb { >>> >>> pins = "PL0", "PL1"; >>> function = "s_rsb"; > > > >
diff --git a/arch/arm/dts/sun50i-a64.dtsi b/arch/arm/dts/sun50i-a64.dtsi index 7a083637c4..d3daf90a87 100644 --- a/arch/arm/dts/sun50i-a64.dtsi +++ b/arch/arm/dts/sun50i-a64.dtsi @@ -43,9 +43,12 @@ */ #include <dt-bindings/clock/sun50i-a64-ccu.h> +#include <dt-bindings/clock/sun8i-de2.h> #include <dt-bindings/clock/sun8i-r-ccu.h> #include <dt-bindings/interrupt-controller/arm-gic.h> #include <dt-bindings/reset/sun50i-a64-ccu.h> +#include <dt-bindings/reset/sun8i-de2.h> +#include <dt-bindings/reset/sun8i-r-ccu.h> / { interrupt-parent = <&gic>; @@ -57,17 +60,21 @@ #size-cells = <1>; ranges; -/* - * The pipeline mixer0-lcd0 depends on clock CLK_MIXER0 from DE2 CCU. - * However there is no support for this clock on A64 yet, so we depend - * on the upstream clocks here to keep them (and thus CLK_MIXER0) up. - */ simplefb_lcd: framebuffer-lcd { compatible = "allwinner,simple-framebuffer", "simple-framebuffer"; allwinner,pipeline = "mixer0-lcd0"; clocks = <&ccu CLK_TCON0>, - <&ccu CLK_DE>, <&ccu CLK_BUS_DE>; + <&display_clocks CLK_MIXER0>; + status = "disabled"; + }; + + simplefb_hdmi: framebuffer-hdmi { + compatible = "allwinner,simple-framebuffer", + "simple-framebuffer"; + allwinner,pipeline = "mixer1-lcd1-hdmi"; + clocks = <&display_clocks CLK_MIXER1>, + <&ccu CLK_TCON1>, <&ccu CLK_HDMI>; status = "disabled"; }; }; @@ -168,10 +175,46 @@ #size-cells = <1>; ranges; + de2@1000000 { + compatible = "allwinner,sun50i-a64-de2"; + reg = <0x1000000 0x400000>; + allwinner,sram = <&de2_sram 1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1000000 0x400000>; + + display_clocks: clock@0 { + compatible = "allwinner,sun50i-a64-de2-clk"; + reg = <0x0 0x100000>; + clocks = <&ccu CLK_DE>, + <&ccu CLK_BUS_DE>; + clock-names = "mod", + "bus"; + resets = <&ccu RST_BUS_DE>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + syscon: syscon@1c00000 { - compatible = "allwinner,sun50i-a64-system-controller", - "syscon"; + compatible = "allwinner,sun50i-a64-system-control"; reg = <0x01c00000 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + sram_c: sram@18000 { + compatible = "mmio-sram"; + reg = <0x00018000 0x28000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x00018000 0x28000>; + + de2_sram: sram-section@0 { + compatible = "allwinner,sun50i-a64-sram-c"; + reg = <0x0000 0x28000>; + }; + }; }; dma: dma-controller@1c02000 { @@ -364,6 +407,11 @@ bias-pull-up; }; + pwm_pin: pwm_pin { + pins = "PD22"; + function = "pwm"; + }; + rmii_pins: rmii_pins { pins = "PD10", "PD11", "PD13", "PD14", "PD17", "PD18", "PD19", "PD20", "PD22", "PD23"; @@ -474,15 +522,6 @@ status = "disabled"; }; - pwm: pwm@1c21400 { - compatible = "allwinner,sun50i-a64-pwm", - "allwinner,sun5i-a13-pwm"; - reg = <0x01c21400 0x8>; - clocks = <&osc24M>; - #pwm-cells = <3>; - status = "disabled"; - }; - uart0: serial@1c28000 { compatible = "snps,dw-apb-uart"; reg = <0x01c28000 0x400>; @@ -617,8 +656,6 @@ clocks = <&ccu CLK_BUS_EMAC>; clock-names = "stmmaceth"; status = "disabled"; - #address-cells = <1>; - #size-cells = <0>; mdio: mdio { compatible = "snps,dwmac-mdio"; @@ -638,11 +675,25 @@ #interrupt-cells = <3>; }; + pwm: pwm@1c21400 { + compatible = "allwinner,sun50i-a64-pwm", + "allwinner,sun5i-a13-pwm"; + reg = <0x01c21400 0x400>; + clocks = <&osc24M>; + pinctrl-names = "default"; + pinctrl-0 = <&pwm_pin>; + #pwm-cells = <3>; + status = "disabled"; + }; + rtc: rtc@1f00000 { compatible = "allwinner,sun6i-a31-rtc"; reg = <0x01f00000 0x54>; interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; + clock-output-names = "rtc-osc32k", "rtc-osc32k-out"; + clocks = <&osc32k>; + #clock-cells = <1>; }; r_intc: interrupt-controller@1f00c00 { @@ -664,6 +715,29 @@ #reset-cells = <1>; }; + r_i2c: i2c@1f02400 { + compatible = "allwinner,sun50i-a64-i2c", + "allwinner,sun6i-a31-i2c"; + reg = <0x01f02400 0x400>; + interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&r_ccu CLK_APB0_I2C>; + resets = <&r_ccu RST_APB0_I2C>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + }; + + r_pwm: pwm@1f03800 { + compatible = "allwinner,sun50i-a64-pwm", + "allwinner,sun5i-a13-pwm"; + reg = <0x01f03800 0x400>; + clocks = <&osc24M>; + pinctrl-names = "default"; + pinctrl-0 = <&r_pwm_pin>; + #pwm-cells = <3>; + status = "disabled"; + }; + r_pio: pinctrl@1f02c00 { compatible = "allwinner,sun50i-a64-r-pinctrl"; reg = <0x01f02c00 0x400>; @@ -675,6 +749,16 @@ interrupt-controller; #interrupt-cells = <3>; + r_i2c_pins_a: i2c-a { + pins = "PL8", "PL9"; + function = "s_i2c"; + }; + + r_pwm_pin: pwm { + pins = "PL10"; + function = "s_pwm"; + }; + r_rsb_pins: rsb { pins = "PL0", "PL1"; function = "s_rsb";
Updates the device tree file from the the Linux tree as of v4.19-rc4, exactly Linux commit: commit 7876320f8880 (tag: v4.19-rc4) Author: Linus Torvalds <torvalds@linux-foundation.org> Date: Sun Sep 16 11:52:37 2018 -0700 Linux 4.19-rc4 Signed-off-by: Vasily Khoruzhick <anarsoul@gmail.com> --- arch/arm/dts/sun50i-a64.dtsi | 122 +++++++++++++++++++++++++++++------ 1 file changed, 103 insertions(+), 19 deletions(-)