RFA: another patch to solve PR49154
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Message ID alpine.BSF.2.00.1106020614001.17685@dair.pair.com
State New
Headers show

Commit Message

Hans-Peter Nilsson June 2, 2011, 10:24 a.m. UTC
On Tue, 31 May 2011, Richard Sandiford wrote:

> Gah, seems like I'd forgotten the "no subclasses" bit by the time
> I started looking at code.  Sorry for the false alarm.

Still, the extra look made me realise that I should have
restricted that statement to allocatable registers.
(And I really do appreciate a look from a native speaker.)

Updated patch follows, checked dvi and info output:

	* doc/tm.texi.in (Register Classes): Document rule for the narrowest
	register classes.
	* doc/tm.texi: Regenerate.


brgds, H-P

Patch
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Index: doc/tm.texi.in
===================================================================
--- doc/tm.texi.in	(revision 174376)
+++ doc/tm.texi.in	(working copy)
@@ -2327,6 +2327,12 @@  constraints is through machine-dependent
 You can define such letters to correspond to various classes, then use
 them in operand constraints.

+You must define the narrowest register classes for allocatable
+registers, so that each class either has no subclasses, or that for
+some mode, the move cost between registers within the class is
+cheaper than moving a register in the class to or from memory
+(@pxref{Costs}).
+
 You should define a class for the union of two classes whenever some
 instruction allows both classes.  For example, if an instruction allows
 either a floating point (coprocessor) register or a general register for a