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Wed, 10 Oct 2018 09:33:26 +0000 From: =?utf-8?b?Vm9rw6HEjSBNaWNoYWw=?= To: Thierry Reding , Rob Herring CC: Mark Rutland , "devicetree@vger.kernel.org" , "linux-pwm@vger.kernel.org" , "linux-kernel@vger.kernel.org" , Lukasz Majewski , Fabio Estevam , =?utf-8?q?Lothar_Wa=C3=9Fmann?= , =?utf-8?b?Vm9rw6HEjSBNaWNoYWw=?= Subject: =?utf-8?q?=5BRCF=C2=A0PATCH_v2_2/2=5D_pwm=3A_imx=3A_Configure_ou?= =?utf-8?q?tput_to_GPIO_in_disabled_state?= Thread-Topic: =?utf-8?q?=5BRCF=C2=A0PATCH_v2_2/2=5D_pwm=3A_imx=3A_Configu?= =?utf-8?q?re_output_to_GPIO_in_disabled_state?= Thread-Index: AQHUYHxLNWnXvPuyf0G4S0CzwIUtng== Date: Wed, 10 Oct 2018 09:33:26 +0000 Message-ID: <1539163920-9442-3-git-send-email-michal.vokac@ysoft.com> References: <1539163920-9442-1-git-send-email-michal.vokac@ysoft.com> In-Reply-To: <1539163920-9442-1-git-send-email-michal.vokac@ysoft.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: x-clientproxiedby: VI1PR03CA0078.eurprd03.prod.outlook.com (2603:10a6:803:50::49) To DB7PR04MB4667.eurprd04.prod.outlook.com (2603:10a6:5:37::13) authentication-results: spf=none (sender IP is ) smtp.mailfrom=Michal.Vokac@ysoft.com; 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DIR:OUT; SFP:1101; SCL:1; SRVR:DB7PR04MB5194; H:DB7PR04MB4667.eurprd04.prod.outlook.com; FPR:; SPF:None; LANG:en; PTR:InfoNoRecords; MX:1; A:1; received-spf: None (protection.outlook.com: ysoft.com does not designate permitted sender hosts) x-microsoft-antispam-message-info: mHpEXaRMvA5mszd6xm+firyY8H/fGQ12ULigyPGxv7FbSOts9dcKjpCG1NEVCJvq29i9ana24Nvs3yXnGOBSUY0zWvAiwEPHPfBMsOSiMJKfXtpjXXDlxRWkng/n+0akLATyamc+clRpsLopsMxUcIpLoCDG0Wv5Mqk2dmoJ1iLXgbE+I+UjDS/AxDtKYL+V29CFNMo9/fYL/GGBLTmG5L/w65/G2tA4h95v/1hdG52syAxKEDI5VQL3ZwFt29ncaxdsWndd2hMl4BXsdlleqlszYLKLXk0D3iJEqNFKOpZUx0ZoH8+yd0z/h16GzVLBWug/H6cxpbzf7gKTveZifRFCsb8tzj3YQbioAgnu0xY= spamdiagnosticoutput: 1:99 spamdiagnosticmetadata: NSPM Content-ID: <1B3A97A781D508498FD89649644DED9F@eurprd04.prod.outlook.com> MIME-Version: 1.0 X-OriginatorOrg: ysoft.com X-MS-Exchange-CrossTenant-Network-Message-Id: e9a25d60-7a68-4e4f-fb60-08d62e936dfc X-MS-Exchange-CrossTenant-originalarrivaltime: 10 Oct 2018 09:33:26.3732 (UTC) X-MS-Exchange-CrossTenant-fromentityheader: Hosted X-MS-Exchange-CrossTenant-id: b5839965-430f-4be2-b282-d7a3149f2b37 X-MS-Exchange-Transport-CrossTenantHeadersStamped: DB7PR04MB5194 Sender: linux-pwm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pwm@vger.kernel.org Normally the PWM output is held LOW when PWM is disabled. This can cause problems when inverted PWM signal polarity is needed. With this behavior the connected circuit is fed by 100% duty cycle instead of being shut-off. Allow users to define a "gpio" and a "pwm" pinctrl states. The pwm pinctrl state is then selected when PWM is enabled and the gpio pinctrl state is selected when PWM is disabled. Also add a new pwm-gpios GPIO that is used to drive the output in the gpio state. If all the pinctrl states and the pwm-gpios are not correctly specified in DT the logic will work as before. As an example, with this patch a PWM controlled backlight with inversed signal polarity can be used in full brightness range. Without this patch the backlight can not be turned off as brightness = 0 disables the PWM and that in turn set PWM output LOW, that is full brightness. Output of the PWM with "default" pinctrl and with "pwm"+"gpio" pinctrl: +--------------+------------+---------------+---------------------------+ | After reset | Bootloader | Linux pinctrl | User (sysfs, backlight..) | | 100k pull-up | (not used) | | enable | disable | +--------------+------------+---------------+---------------------------+ ___________________________ default _ _ _ |_________________| |_| |_| |_|_____________ pwm + gpio ___________________________________________ _ _ _ _____________ |_| |_| |_| |_| Signed-off-by: Michal Vokáč --- Changes in v2: - Utilize the "pwm" and "gpio" pinctrl states. - Use the pwm-gpios signal to drive the output in "gpio" pinctrl state. - Select the right pinctrl state in probe. drivers/pwm/pwm-imx.c | 86 +++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 86 insertions(+) diff --git a/drivers/pwm/pwm-imx.c b/drivers/pwm/pwm-imx.c index 6cd3b72..3502123 100644 --- a/drivers/pwm/pwm-imx.c +++ b/drivers/pwm/pwm-imx.c @@ -10,11 +10,13 @@ #include #include #include +#include #include #include #include #include #include +#include #include #include #include @@ -92,10 +94,45 @@ struct imx_chip { void __iomem *mmio_base; struct pwm_chip chip; + + struct pinctrl *pinctrl; + struct pinctrl_state *pinctrl_pins_gpio; + struct pinctrl_state *pinctrl_pins_pwm; + struct gpio_desc *pwm_gpiod; }; + #define to_imx_chip(chip) container_of(chip, struct imx_chip, chip) +static int imx_pwm_init_pinctrl_info(struct imx_chip *imx_chip, + struct platform_device *pdev) +{ + imx_chip->pinctrl = devm_pinctrl_get(&pdev->dev); + if (!imx_chip->pinctrl || IS_ERR(imx_chip->pinctrl)) { + dev_info(&pdev->dev, "can not get pinctrl\n"); + return PTR_ERR(imx_chip->pinctrl); + } + + imx_chip->pinctrl_pins_pwm = pinctrl_lookup_state(imx_chip->pinctrl, + "pwm"); + imx_chip->pinctrl_pins_gpio = pinctrl_lookup_state(imx_chip->pinctrl, + "gpio"); + imx_chip->pwm_gpiod = devm_gpiod_get_optional(&pdev->dev, "pwm", + GPIOD_IN); + + if (PTR_ERR(imx_chip->pwm_gpiod) == -EPROBE_DEFER) { + return -EPROBE_DEFER; + } else if (IS_ERR(imx_chip->pwm_gpiod) || + IS_ERR(imx_chip->pinctrl_pins_pwm) || + IS_ERR(imx_chip->pinctrl_pins_gpio)) { + dev_dbg(&pdev->dev, "PWM pinctrl information incomplete\n"); + devm_pinctrl_put(imx_chip->pinctrl); + imx_chip->pinctrl = NULL; + } + + return 0; +} + static void imx_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state) { @@ -306,7 +343,31 @@ static int imx_pwm_apply_v2(struct pwm_chip *chip, struct pwm_device *pwm, MX3_PWMCR_POUTC_INVERTED); writel(cr, imx->mmio_base + MX3_PWMCR); + + /* + * If we are in charge of pinctrl then switch output to + * the PWM signal. + */ + if (imx->pinctrl) + pinctrl_select_state(imx->pinctrl, + imx->pinctrl_pins_pwm); } else if (cstate.enabled) { + /* + * PWM block will be disabled. Normally its output will be set + * low no matter what output polarity is configured. Lets use + * pinctrl to switch the output pin to GPIO functon and keep + * the output at the same level as for duty-cycle = 0. + * + * First set the GPIO to the desired level, then switch the + * muxing and at last disable PWM. In that order we do not get + * unwanted logic level changes on the output. + */ + if (imx->pinctrl) { + gpiod_set_value_cansleep(imx->pwm_gpiod, 0); + pinctrl_select_state(imx->pinctrl, + imx->pinctrl_pins_gpio); + } + writel(0, imx->mmio_base + MX3_PWMCR); clk_disable_unprepare(imx->clk_per); @@ -354,6 +415,7 @@ static int imx_pwm_probe(struct platform_device *pdev) const struct of_device_id *of_id = of_match_device(imx_pwm_dt_ids, &pdev->dev); const struct imx_pwm_data *data; + struct pwm_state cstate; struct imx_chip *imx; struct resource *r; int ret = 0; @@ -385,6 +447,10 @@ static int imx_pwm_probe(struct platform_device *pdev) imx->chip.of_pwm_n_cells = 3; } + ret = imx_pwm_init_pinctrl_info(imx, pdev); + if (ret) + return ret; + r = platform_get_resource(pdev, IORESOURCE_MEM, 0); imx->mmio_base = devm_ioremap_resource(&pdev->dev, r); if (IS_ERR(imx->mmio_base)) @@ -394,6 +460,26 @@ static int imx_pwm_probe(struct platform_device *pdev) if (ret < 0) return ret; + if (imx->pinctrl) { + /* + * Update cstate after pwmchip_add() call as the core might + * call the get_state() function to read the PWM registers + * to get the actual HW state. + */ + pwm_get_state(imx->chip.pwms, &cstate); + if (cstate.enabled) { + dev_dbg(&pdev->dev, + "PWM entered probe in enabled state\n"); + pinctrl_select_state(imx->pinctrl, + imx->pinctrl_pins_pwm); + } else { + gpiod_set_value_cansleep(imx->pwm_gpiod, 0); + pinctrl_select_state(imx->pinctrl, + imx->pinctrl_pins_gpio); + + } + } + platform_set_drvdata(pdev, imx); return 0; }