From patchwork Tue Oct 9 18:51:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Atish Patra X-Patchwork-Id: 981482 Return-Path: X-Original-To: incoming-dt@patchwork.ozlabs.org Delivered-To: patchwork-incoming-dt@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=devicetree-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=wdc.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=wdc.com header.i=@wdc.com header.b="UEIzF27P"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 42V5tC5KTfz9s8r for ; Wed, 10 Oct 2018 05:51:31 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727132AbeJJCJu (ORCPT ); Tue, 9 Oct 2018 22:09:50 -0400 Received: from esa6.hgst.iphmx.com ([216.71.154.45]:53214 "EHLO esa6.hgst.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726460AbeJJCJs (ORCPT ); Tue, 9 Oct 2018 22:09:48 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=wdc.com; i=@wdc.com; q=dns/txt; s=dkim.wdc.com; t=1539111087; x=1570647087; h=from:to:cc:subject:date:message-id:in-reply-to: references; bh=3buQbls5/gIS7422ozrHmZ63B7g/jc69OByotZi7u7I=; b=UEIzF27PKT4lMQ7oWm3gm+dRjYC12BVFvEZsGj7oALm3jKmfT7K9HrfC X2mMn4hKlKtjxhOLzQ+lYi5elUzfFSG/ItzYdbJ39Huo0t66pNV19pTsJ KZKVhcX6arWf/oy1Ie2T4T7NyCLvLmefs4jzQ/AyPgPfLd47phXwwrzge Tqoe1FIaVZzI2g6gP5s17eqCv/HStxVqV87xgnRYNHqoppsXFn2JryfHw fPqATc8nfgBjBkMu2tt7ki5Y+SSICgYWKYPzrRBaUsx5YoVo/huI2GtSi 6bjI+CjoeM9OvTeLlZyGJ3yAN1Nh8V6tvYyWoGIIad8A4JwcVT+3MhRId w==; X-IronPort-AV: E=Sophos;i="5.54,361,1534780800"; d="scan'208";a="93263449" Received: from uls-op-cesaip02.wdc.com (HELO uls-op-cesaep02.wdc.com) ([199.255.45.15]) by ob1.hgst.iphmx.com with ESMTP; 10 Oct 2018 02:51:26 +0800 Received: from uls-op-cesaip02.wdc.com ([10.248.3.37]) by uls-op-cesaep02.wdc.com with ESMTP; 09 Oct 2018 11:36:35 -0700 Received: from jedi-01.sdcorp.global.sandisk.com (HELO jedi-01.int.fusionio.com) ([10.11.143.218]) by uls-op-cesaip02.wdc.com with ESMTP; 09 Oct 2018 11:51:26 -0700 From: Atish Patra To: palmer@sifive.com, linux-riscv@lists.infradead.org, linux-pwm@vger.kernel.org, linux-gpio@vger.kernel.org Cc: linus.walleij@linaro.org, robh+dt@kernel.org, thierry.reding@gmail.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, mark.rutland@arm.com, hch@infradead.org, atish.patra@wdc.com Subject: [RFC 1/4] pwm: sifive: Add DT documentation for SiFive PWM Controller. Date: Tue, 9 Oct 2018 11:51:22 -0700 Message-Id: <1539111085-25502-2-git-send-email-atish.patra@wdc.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1539111085-25502-1-git-send-email-atish.patra@wdc.com> References: <1539111085-25502-1-git-send-email-atish.patra@wdc.com> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: "Wesley W. Terpstra" DT documentation for PWM controller added with updated compatible string. Signed-off-by: Wesley W. Terpstra [Atish: Compatible string update] Signed-off-by: Atish Patra --- .../devicetree/bindings/pwm/pwm-sifive.txt | 32 ++++++++++++++++++++++ 1 file changed, 32 insertions(+) create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sifive.txt diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.txt b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt new file mode 100644 index 00000000..532b10fc --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.txt @@ -0,0 +1,32 @@ +SiFive PWM controller + +Unlike most other PWM controllers, the SiFive PWM controller currently only +supports one period for all channels in the PWM. This is set globally in DTS. +The period also has significant restrictions on the values it can achieve, +which the driver rounds to the nearest achievable frequency. + +Required properties: +- compatible: should be one of + "sifive,fu540-c000-pwm0","sifive,pwm0". + PWM controller is HiFive Unleashed specific chip which warrants a + specific compatible string. The second string is kept for backward + compatibility until a firmware update with latest compatible string. +- reg: physical base address and length of the controller's registers +- clocks: The frequency the controller runs at +- #pwm-cells: Should be 2. + The first cell is the PWM channel number + The second cell is the PWM polarity +- sifive,approx-period: the driver will get as close to this period as it can +- interrupts: one interrupt per PWM channel (currently unused in the driver) + +Examples: + +pwm: pwm@10020000 { + compatible = "sifive,fu540-c000-pwm0","sifive,pwm0"; + reg = <0x0 0x10020000 0x0 0x1000>; + clocks = <&tlclk>; + interrupt-parent = <&plic>; + interrupts = <42 43 44 45>; + #pwm-cells = <2>; + sifive,approx-period = <1000000>; +};