From patchwork Tue Oct 9 07:32:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Jeffery X-Patchwork-Id: 981076 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 42Tpt6623Kz9s9G for ; Tue, 9 Oct 2018 18:35:26 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="QGy9AHCR"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="e9jda+7t"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 42Tpt64LgNzF3Ns for ; Tue, 9 Oct 2018 18:35:26 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="QGy9AHCR"; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="e9jda+7t"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=aj.id.au (client-ip=66.111.4.27; helo=out3-smtp.messagingengine.com; envelope-from=andrew@aj.id.au; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=aj.id.au Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=aj.id.au header.i=@aj.id.au header.b="QGy9AHCR"; dkim=pass (2048-bit key; unprotected) header.d=messagingengine.com header.i=@messagingengine.com header.b="e9jda+7t"; dkim-atps=neutral Received: from out3-smtp.messagingengine.com (out3-smtp.messagingengine.com [66.111.4.27]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 42TpqN0g1BzF3BW for ; Tue, 9 Oct 2018 18:33:04 +1100 (AEDT) Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 917DD21F83; Tue, 9 Oct 2018 03:32:59 -0400 (EDT) Received: from mailfrontend1 ([10.202.2.162]) by compute4.internal (MEProxy); Tue, 09 Oct 2018 03:32:59 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=aj.id.au; h=from :to:cc:subject:date:message-id:in-reply-to:references; s=fm3; bh=qgOrYXsALv8wJB86kgQmkNwmgJCkt2rouSL4BqlAGno=; b=QGy9AHCR0wX4 IBjJc+dxxaFHSWkW3yDwp2jVzaBRjHiv0dRkjiyVBUkk0bx9QZrJknhAIG6/SuTr xuQxx034UPnP0QajxseFcIbyx8kWhNXOWs4WllLQO0opDkxgeBhLJ2MDuTd/DpLp v7ZJYeYqeiLqstMaHiN3gf5SXRh1+/sDfB9qZYLK0Ix8eEMfOp14IWCw5jmp4TMz bQ74o4PeNQpByi/aFB7LS/EYv2l2bA34nWP6Sn8rISdmNT0VhRhCftSAAX7RbXK/ CByypEpm38Z0+IFa3CA+6wBQ13p/EWhLtIEXt7OMFpg5EmTHk2MGw8w8EYruqWzk 6rL63t6rjg== DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:in-reply-to:message-id :references:subject:to:x-me-proxy:x-me-proxy:x-me-sender :x-me-sender:x-sasl-enc; s=fm1; bh=qgOrYXsALv8wJB86kgQmkNwmgJCkt 2rouSL4BqlAGno=; b=e9jda+7tLSY0NJAYN+aTdFFYsX+T4PznLvRw2WDrFxnfb 4ZP9PFzOct0YqRtTelcvr5+8OpfIcmk2uHZPqMEigzC1UTQGOmBSBw9lBzn1m3QG Dk6prhVNZwips793WUHWAkEnVWEadZD3G++lNLoTpCu3NMWiiU+mtu+PohqlQZzd FdZVcSJQlgYHthBU2QEvU9JW4l3SneKEIvuJKa9tpGQ15U+iZ1MKHv3FNHXUGGcZ iYr11l+VS24iBgR33jaLXktAeZwVL3Exlmr4OBt1eYTKW4dOlY4YuR/loIsXVBhe nuUMtFfl2bashpNBxTTlrt+kVsBBK0rdIeoWuKo1A== X-ME-Sender: X-ME-Proxy: Received: from dave.ibm.com (50-203-181-99-static.hfc.comcastbusiness.net [50.203.181.99]) by mail.messagingengine.com (Postfix) with ESMTPA id 5CC50E4307; Tue, 9 Oct 2018 03:32:58 -0400 (EDT) From: Andrew Jeffery To: skiboot@lists.ozlabs.org Date: Tue, 9 Oct 2018 00:32:32 -0700 Message-Id: <20181009073237.16251-7-andrew@aj.id.au> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181009073237.16251-1-andrew@aj.id.au> References: <20181009073237.16251-1-andrew@aj.id.au> Subject: [Skiboot] [PATCH v3 06/11] astbmc: Prefer ipmi-hiomap for PNOR access X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: dkodihal@in.ibm.com, Andrew Jeffery , anoo@linux.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" If the IPMI command is not available, fall back to the mailbox interface. Signed-off-by: Andrew Jeffery --- hw/ast-bmc/ast-io.c | 10 +++++++--- include/ast.h | 4 ++-- libflash/mbox-flash.c | 6 ++++++ platforms/astbmc/common.c | 10 ++++++---- platforms/astbmc/pnor.c | 42 +++++++++++++++++++++++++++++---------- 5 files changed, 53 insertions(+), 19 deletions(-) diff --git a/hw/ast-bmc/ast-io.c b/hw/ast-bmc/ast-io.c index a6ae85a4d24f..e8258b4cfc02 100644 --- a/hw/ast-bmc/ast-io.c +++ b/hw/ast-bmc/ast-io.c @@ -426,12 +426,16 @@ bool ast_io_init(void) return ast_io_is_rw(); } -bool ast_lpc_fw_is_mbox(void) +bool ast_lpc_fw_needs_hiomap(void) { - return dt_find_compatible_node(dt_root, NULL, "mbox"); + struct dt_node *n; + + n = dt_find_compatible_node(dt_root, NULL, "mbox"); + + return n != NULL; } -bool ast_lpc_fw_is_flash(void) +bool ast_lpc_fw_maps_flash(void) { uint8_t boot_version; uint8_t boot_flags; diff --git a/include/ast.h b/include/ast.h index b30f7bf27737..4c8fd817b253 100644 --- a/include/ast.h +++ b/include/ast.h @@ -86,8 +86,8 @@ bool ast_can_isolate_sp(void); bool ast_sio_disable(void); bool ast_io_init(void); bool ast_io_is_rw(void); -bool ast_lpc_fw_is_flash(void); -bool ast_lpc_fw_is_mbox(void); +bool ast_lpc_fw_maps_flash(void); +bool ast_lpc_fw_needs_hiomap(void); bool ast_scratch_reg_is_mbox(void); /* UART configuration */ diff --git a/libflash/mbox-flash.c b/libflash/mbox-flash.c index 3239be964b57..11ec90523d58 100644 --- a/libflash/mbox-flash.c +++ b/libflash/mbox-flash.c @@ -1134,6 +1134,12 @@ int mbox_flash_init(struct blocklevel_device **bl) if (!bl) return FLASH_ERR_PARM_ERROR; + /* XXX: We only support one blocklevel flash device over mbox. If we + * ever support more than one, move this out. The chances of that are + * slim though due to circumstances. + */ + mbox_init(); + *bl = NULL; mbox_flash = zalloc(sizeof(struct mbox_flash_data)); diff --git a/platforms/astbmc/common.c b/platforms/astbmc/common.c index 23550ef37a67..f3b7e749f87c 100644 --- a/platforms/astbmc/common.c +++ b/platforms/astbmc/common.c @@ -120,11 +120,15 @@ static int astbmc_fru_init(void) void astbmc_init(void) { + /* Register the BT interface with the IPMI layer + * + * Initialise this first to enable PNOR access + */ + bt_init(); + /* Initialize PNOR/NVRAM */ pnor_init(); - /* Register the BT interface with the IPMI layer */ - bt_init(); /* Initialize elog */ elog_init(); ipmi_sel_init(); @@ -423,8 +427,6 @@ void astbmc_early_init(void) /* Setup UART and use it as console */ uart_init(); - mbox_init(); - prd_init(); } diff --git a/platforms/astbmc/pnor.c b/platforms/astbmc/pnor.c index 55784ee4594f..d2694768e330 100644 --- a/platforms/astbmc/pnor.c +++ b/platforms/astbmc/pnor.c @@ -18,6 +18,7 @@ #include #include #include +#include #include #include #include @@ -26,16 +27,27 @@ #include "astbmc.h" +enum ast_flash_style { + raw_flash, + raw_mem, + ipmi_hiomap, + mbox_hiomap, +}; + int pnor_init(void) { struct spi_flash_ctrl *pnor_ctrl = NULL; struct blocklevel_device *bl = NULL; + enum ast_flash_style style; int rc; - bool do_mbox; - do_mbox = ast_lpc_fw_is_mbox(); - if (do_mbox) { - rc = mbox_flash_init(&bl); + if (ast_lpc_fw_needs_hiomap()) { + style = ipmi_hiomap; + rc = ipmi_hiomap_init(&bl); + if (rc) { + style = mbox_hiomap; + rc = mbox_flash_init(&bl); + } } else { /* Open controller and flash. If the LPC->AHB doesn't point to * the PNOR flash base we assume we're booting from BMC system @@ -43,10 +55,12 @@ int pnor_init(void) * FW reads & writes). */ - if (ast_lpc_fw_is_flash()) + if (ast_lpc_fw_maps_flash()) { + style = raw_flash; rc = ast_sf_open(AST_SF_TYPE_PNOR, &pnor_ctrl); - else { + } else { printf("PLAT: Memboot detected\n"); + style = raw_mem; rc = ast_sf_open(AST_SF_TYPE_MEM, &pnor_ctrl); } if (rc) { @@ -66,12 +80,20 @@ int pnor_init(void) if (!rc) return 0; - fail: +fail: if (bl) { - if (do_mbox) - mbox_flash_exit(bl); - else + switch (style) { + case raw_flash: + case raw_mem: flash_exit(bl); + break; + case ipmi_hiomap: + ipmi_hiomap_exit(bl); + break; + case mbox_hiomap: + mbox_flash_exit(bl); + break; + } } if (pnor_ctrl) ast_sf_close(pnor_ctrl);