[v2,2/4] dt-bindings: imx6q-pcie: Add multi-pd bindings for imx6sx

Message ID fb622df91d2e4aa339e8831fb8bcde03327f5bda.1539020938.git.leonard.crestez@nxp.com
State Not Applicable
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Series
  • ARM: dts: imx6sx: Add DISPLAY power domain support
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Commit Message

Leonard Crestez Oct. 8, 2018, 6:06 p.m.
The PCIE and PCIE_PHY blocks are in different power domains on imx6sx
and this needs to be described using multi-pd bindings.

This was not required until now because the power-domain of the PCIE
block (DISPLAY) was always on.

Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
---
 Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Rob Herring Oct. 12, 2018, 10:09 p.m. | #1
On Mon, 8 Oct 2018 18:06:20 +0000, Leonard Crestez wrote:
> The PCIE and PCIE_PHY blocks are in different power domains on imx6sx
> and this needs to be described using multi-pd bindings.
> 
> This was not required until now because the power-domain of the PCIE
> block (DISPLAY) was always on.
> 
> Signed-off-by: Leonard Crestez <leonard.crestez@nxp.com>
> ---
>  Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 

Reviewed-by: Rob Herring <robh@kernel.org>

Patch

diff --git a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
index f37494d5a7be..d514c1f2365f 100644
--- a/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/fsl,imx6q-pcie.txt
@@ -39,11 +39,13 @@  Optional properties:
   host.
 
 Additional required properties for imx6sx-pcie:
 - clock names: Must include the following additional entries:
 	- "pcie_inbound_axi"
-- power-domains: Must be set to a phandle pointing to the PCIE_PHY power domain
+- power-domains: Must be set to phandles pointing to the DISPLAY and
+  PCIE_PHY power domains
+- power-domain-names: Must be "pcie", "pcie_phy"
 
 Additional required properties for imx7d-pcie:
 - power-domains: Must be set to a phandle pointing to PCIE_PHY power domain
 - resets: Must contain phandles to PCIe-related reset lines exposed by SRC
   IP block