From patchwork Sat May 28 10:08:58 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Blue Swirl X-Patchwork-Id: 97783 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id F1B4DB6F8B for ; Sat, 28 May 2011 20:09:57 +1000 (EST) Received: from localhost ([::1]:45885 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QQGSx-0002ch-3f for incoming@patchwork.ozlabs.org; Sat, 28 May 2011 06:09:55 -0400 Received: from eggs.gnu.org ([140.186.70.92]:59183) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QQGSN-0002HZ-DJ for qemu-devel@nongnu.org; Sat, 28 May 2011 06:09:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QQGSM-0005gr-9v for qemu-devel@nongnu.org; Sat, 28 May 2011 06:09:19 -0400 Received: from mail-qw0-f45.google.com ([209.85.216.45]:36130) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QQGSM-0005cv-6g for qemu-devel@nongnu.org; Sat, 28 May 2011 06:09:18 -0400 Received: by mail-qw0-f45.google.com with SMTP id 8so1417095qwj.4 for ; Sat, 28 May 2011 03:09:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:mime-version:from:date:message-id:subject:to :content-type; bh=RToLRkzHe0Zh5eP1ImnvSKAwEk/jIEgn0JNzDmo5e44=; b=WLpbgeiCp3dU0HF/cDeKVGt/mRxbIIzrqZrwsQjIKPZ6t0NvRCl2dsr+hwcD8QnXl0 fUU28XhEd/SMPZ87SY4yDOHd1bwlcPXYl6e4r6PCXmqaMngghIBQni0AEAeJ5WjkUmTr Tdx78JGaJbS8sGKo0TEs6jooePGKZnTORJJcU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=mime-version:from:date:message-id:subject:to:content-type; b=bgjwkFnErtz4Ki9ZX3Pa+i3TUA3v6k5+oZOUv9AatKrcwKie3Xp+DyQ3HgBOrPBkOx UbIRavFoZJ9Znh5dWrjpAc7a5KuirHrUWN2cdoedDlWzGNkVaKx4KQloBOm8Eb4VH36S jj/5MIz8QJLKG67odaF0jJR8z5I2PJnSUneYk= Received: by 10.224.193.1 with SMTP id ds1mr2159904qab.231.1306577358047; Sat, 28 May 2011 03:09:18 -0700 (PDT) MIME-Version: 1.0 Received: by 10.224.45.202 with HTTP; Sat, 28 May 2011 03:08:58 -0700 (PDT) From: Blue Swirl Date: Sat, 28 May 2011 13:08:58 +0300 Message-ID: To: qemu-devel X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.216.45 Subject: [Qemu-devel] [PATCH 18/18] Remove temp_buf, rename CPU_TEMP_BUF_NLONGS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Remove now unused temp_buf from CPUState. Rename CPU_TEMP_BUF_NLONGS to TCG_TEMP_BUF_NLONGS. Signed-off-by: Blue Swirl --- cpu-defs.h | 3 --- tcg/arm/tcg-target.c | 6 +++--- tcg/hppa/tcg-target.c | 4 ++-- tcg/i386/tcg-target.c | 4 ++-- tcg/ia64/tcg-target.c | 4 ++-- tcg/mips/tcg-target.c | 6 +++--- tcg/ppc/tcg-target.c | 6 +++--- tcg/ppc64/tcg-target.c | 6 +++--- tcg/s390/tcg-target.c | 4 ++-- tcg/sparc/tcg-target.c | 4 ++-- tcg/tcg.h | 3 +++ 11 files changed, 25 insertions(+), 25 deletions(-) diff --git a/cpu-defs.h b/cpu-defs.h index db48a7a..a76fc31 100644 --- a/cpu-defs.h +++ b/cpu-defs.h @@ -153,7 +153,6 @@ typedef struct CPUWatchpoint { QTAILQ_ENTRY(CPUWatchpoint) entry; } CPUWatchpoint; -#define CPU_TEMP_BUF_NLONGS 128 #define CPU_COMMON \ struct TranslationBlock *current_tb; /* currently executing TB */ \ /* soft mmu support */ \ @@ -169,8 +168,6 @@ typedef struct CPUWatchpoint { volatile sig_atomic_t exit_request; \ CPU_COMMON_TLB \ struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \ - /* buffer for temporaries in the code generator */ \ - long temp_buf[CPU_TEMP_BUF_NLONGS]; \ \ int64_t icount_extra; /* Instructions until next timer event. */ \ /* Number of cycles left, with interrupt flag in high bit. \ diff --git a/tcg/arm/tcg-target.c b/tcg/arm/tcg-target.c index eacda6b..c142eec 100644 --- a/tcg/arm/tcg-target.c +++ b/tcg/arm/tcg-target.c @@ -1847,7 +1847,7 @@ static inline void tcg_out_movi(TCGContext *s, TCGType type, static void tcg_target_qemu_prologue(TCGContext *s) { tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE, - CPU_TEMP_BUF_NLONGS * sizeof(long)); + TCG_TEMP_BUF_NLONGS * sizeof(long)); /* Calling convention requires us to save r4-r11 and lr; * save also r12 to maintain stack 8-alignment. @@ -1857,7 +1857,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) tcg_out32(s, (COND_AL << 28) | 0x092d5ff0); tcg_out_addi(s, TCG_REG_CALL_STACK, -TCG_STATIC_CALL_ARGS_SIZE - - CPU_TEMP_BUF_NLONGS * sizeof(long))); + TCG_TEMP_BUF_NLONGS * sizeof(long))); tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, tcg_target_call_iarg_regs[0]); @@ -1865,7 +1865,7 @@ static void tcg_target_qemu_prologue(TCGContext *s) tb_ret_addr = s->code_ptr; tcg_out_addi(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE + - CPU_TEMP_BUF_NLONGS * sizeof(long)); + TCG_TEMP_BUF_NLONGS * sizeof(long)); /* ldmia sp!, { r4 - r12, pc } */ tcg_out32(s, (COND_AL << 28) | 0x08bd9ff0); diff --git a/tcg/hppa/tcg-target.c b/tcg/hppa/tcg-target.c index b900c88..7dac3f5 100644 --- a/tcg/hppa/tcg-target.c +++ b/tcg/hppa/tcg-target.c @@ -1614,8 +1614,8 @@ static void tcg_target_qemu_prologue(TCGContext *s) /* Use the space here for the TCG temps. */ tcg_set_frame(s, TCG_REG_CALL_STACK, frame_size, - CPU_TEMP_BUF_NLONGS * sizeof(long)); - frame_size += CPU_TEMP_BUF_NLONGS * sizeof(long); + TCG_TEMP_BUF_NLONGS * sizeof(long)); + frame_size += TCG_TEMP_BUF_NLONGS * sizeof(long); /* Align the allocated space. */ frame_size = ((frame_size + TCG_TARGET_STACK_ALIGN - 1) diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c index 7529677..3e723f5 100644 --- a/tcg/i386/tcg-target.c +++ b/tcg/i386/tcg-target.c @@ -1923,12 +1923,12 @@ static void tcg_target_qemu_prologue(TCGContext *s) push_size *= TCG_TARGET_REG_BITS / 8; frame_size = push_size + TCG_STATIC_CALL_ARGS_SIZE + - CPU_TEMP_BUF_NLONGS * sizeof(long); + TCG_TEMP_BUF_NLONGS * sizeof(long); frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & ~(TCG_TARGET_STACK_ALIGN - 1); stack_addend = frame_size - push_size; tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE, - CPU_TEMP_BUF_NLONGS * sizeof(long)); + TCG_TEMP_BUF_NLONGS * sizeof(long)); /* Save all callee saved registers. */ for (i = 0; i < ARRAY_SIZE(tcg_target_callee_save_regs); i++) { diff --git a/tcg/ia64/tcg-target.c b/tcg/ia64/tcg-target.c index 528ae64..97aad75 100644 --- a/tcg/ia64/tcg-target.c +++ b/tcg/ia64/tcg-target.c @@ -2280,13 +2280,13 @@ static void tcg_target_qemu_prologue(TCGContext *s) /* reserve some stack space */ frame_size = TCG_STATIC_CALL_ARGS_SIZE + - CPU_TEMP_BUF_NLONGS * sizeof(long); + TCG_TEMP_BUF_NLONGS * sizeof(long); frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & ~(TCG_TARGET_STACK_ALIGN - 1); tcg_set_frame(s, TCG_REG_CALL_STACK, TCG_STATIC_CALL_ARGS_SIZE, - CPU_TEMP_BUF_NLONGS * sizeof(long)); + TCG_TEMP_BUF_NLONGS * sizeof(long)); /* First emit adhoc function descriptor */ *(uint64_t *)(s->code_ptr) = (uint64_t)s->code_ptr + 16; /* entry point */ diff --git a/tcg/mips/tcg-target.c b/tcg/mips/tcg-target.c index d536457..7c8e3c8 100644 --- a/tcg/mips/tcg-target.c +++ b/tcg/mips/tcg-target.c @@ -1472,12 +1472,12 @@ static void tcg_target_qemu_prologue(TCGContext *s) /* reserve some stack space */ frame_size = ARRAY_SIZE(tcg_target_callee_save_regs) * 4 - + TCG_STATIC_CALL_ARGS_SIZE + CPU_TEMP_BUF_NLONGS * sizeof(long); + + TCG_STATIC_CALL_ARGS_SIZE + TCG_TEMP_BUF_NLONGS * sizeof(long); frame_size = (frame_size + TCG_TARGET_STACK_ALIGN - 1) & ~(TCG_TARGET_STACK_ALIGN - 1); tcg_set_frame(s, TCG_REG_CALL_STACK, frame_size - - CPU_TEMP_BUF_NLONGS * sizeof(long), - CPU_TEMP_BUF_NLONGS * sizeof(long)); + - TCG_TEMP_BUF_NLONGS * sizeof(long), + TCG_TEMP_BUF_NLONGS * sizeof(long)); /* TB prologue */ tcg_out_addi(s, TCG_REG_CALL_STACK, -frame_size); diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c index 66ff298..e2abab0 100644 --- a/tcg/ppc/tcg-target.c +++ b/tcg/ppc/tcg-target.c @@ -907,13 +907,13 @@ static void tcg_target_qemu_prologue (TCGContext *s) + LINKAGE_AREA_SIZE + TCG_STATIC_CALL_ARGS_SIZE + ARRAY_SIZE (tcg_target_callee_save_regs) * 4 - + CPU_TEMP_BUF_NLONGS * sizeof(long) + + TCG_TEMP_BUF_NLONGS * sizeof(long) ; frame_size = (frame_size + 15) & ~15; tcg_set_frame(s, TCG_REG_CALL_STACK, frame_size - - CPU_TEMP_BUF_NLONGS * sizeof(long), - CPU_TEMP_BUF_NLONGS * sizeof(long)); + - TCG_TEMP_BUF_NLONGS * sizeof(long), + TCG_TEMP_BUF_NLONGS * sizeof(long)); #ifdef _CALL_AIX { diff --git a/tcg/ppc64/tcg-target.c b/tcg/ppc64/tcg-target.c index 7488b14..399862c 100644 --- a/tcg/ppc64/tcg-target.c +++ b/tcg/ppc64/tcg-target.c @@ -875,13 +875,13 @@ static void tcg_target_qemu_prologue (TCGContext *s) + 8 /* TOC save area */ + TCG_STATIC_CALL_ARGS_SIZE + ARRAY_SIZE (tcg_target_callee_save_regs) * 8 - + CPU_TEMP_BUF_NLONGS * sizeof(long) + + TCG_TEMP_BUF_NLONGS * sizeof(long) ; frame_size = (frame_size + 15) & ~15; tcg_set_frame(s, TCG_REG_CALL_STACK, frame_size - - CPU_TEMP_BUF_NLONGS * sizeof(long), - CPU_TEMP_BUF_NLONGS * sizeof(long)); + - TCG_TEMP_BUF_NLONGS * sizeof(long), + TCG_TEMP_BUF_NLONGS * sizeof(long)); #ifndef __APPLE__ /* First emit adhoc function descriptor */ diff --git a/tcg/s390/tcg-target.c b/tcg/s390/tcg-target.c index c063509..9f66cfa 100644 --- a/tcg/s390/tcg-target.c +++ b/tcg/s390/tcg-target.c @@ -2301,10 +2301,10 @@ static void tcg_target_qemu_prologue(TCGContext *s) /* aghi %r15,-160 (stack frame) */ tcg_out_insn(s, RI, AGHI, TCG_REG_CALL_STACK, - -(160 + CPU_TEMP_BUF_NLONGS * sizeof(long))); + -(160 + TCG_TEMP_BUF_NLONGS * sizeof(long))); tcg_set_frame(s, TCG_REG_CALL_STACK, 160, - CPU_TEMP_BUF_NLONGS * sizeof(long)); + TCG_TEMP_BUF_NLONGS * sizeof(long)); if (GUEST_BASE >= 0x80000) { tcg_out_movi(s, TCG_TYPE_PTR, TCG_GUEST_BASE_REG, GUEST_BASE); tcg_regset_set_reg(s->reserved_regs, TCG_GUEST_BASE_REG); diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c index ac76e11..10b9b8c 100644 --- a/tcg/sparc/tcg-target.c +++ b/tcg/sparc/tcg-target.c @@ -694,10 +694,10 @@ static void tcg_out_setcond2_i32(TCGContext *s, TCGCond cond, TCGArg ret, static void tcg_target_qemu_prologue(TCGContext *s) { tcg_set_frame(s, TCG_REG_I6, TCG_TARGET_CALL_STACK_OFFSET, - CPU_TEMP_BUF_NLONGS * (int)sizeof(long)); + TCG_TEMP_BUF_NLONGS * (int)sizeof(long)); tcg_out32(s, SAVE | INSN_RD(TCG_REG_O6) | INSN_RS1(TCG_REG_O6) | INSN_IMM13(-(TCG_TARGET_STACK_MINFRAME + - CPU_TEMP_BUF_NLONGS * (int)sizeof(long)))); + TCG_TEMP_BUF_NLONGS * (int)sizeof(long)))); tcg_out32(s, JMPL | INSN_RD(TCG_REG_G0) | INSN_RS1(TCG_REG_I1) | INSN_RS2(TCG_REG_G0)); tcg_out_mov(s, TCG_TYPE_PTR, TCG_AREG0, TCG_REG_I0); diff --git a/tcg/tcg.h b/tcg/tcg.h index d361b3a..7c4e3bd 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -92,6 +92,9 @@ typedef struct TCGPool { #define TCG_MAX_TEMPS 512 +/* buffer for temporaries */ +#define TCG_TEMP_BUF_NLONGS 128 + /* when the size of the arguments of a called function is smaller than this value, they are statically allocated in the TB stack frame */ #define TCG_STATIC_CALL_ARGS_SIZE 128