diff --git a/gcc/ChangeLog.x32 b/gcc/ChangeLog.x32
index bf844ea..3a5b9e7 100644
--- a/gcc/ChangeLog.x32
+++ b/gcc/ChangeLog.x32
@@ -1,3 +1,9 @@
+2011-05-24  H.J. Lu  <hongjiu.lu@intel.com>
+
+	PR rtl-optimization/49114
+	* reload1.c (gen_reload): Properly handle
+	(set reg:X (plus:X (subreg:X (reg:Y) 0) (const_int)))
+
 2011-05-21  H.J. Lu  <hongjiu.lu@intel.com>
 
 	PR rtl-optimization/49088
diff --git a/gcc/reload1.c b/gcc/reload1.c
index 4a697c2..d618a29 100644
--- a/gcc/reload1.c
+++ b/gcc/reload1.c
@@ -8528,7 +8528,9 @@ gen_reload (rtx out, rtx in, int opnum, enum reload_type type)
 
       code = optab_handler (add_optab, GET_MODE (out));
 
-      if (CONSTANT_P (op1) || MEM_P (op1) || GET_CODE (op1) == SUBREG
+      if ((GET_CODE (op0) != SUBREG
+	   && (CONSTANT_P (op1) || MEM_P (op1)))
+	  || GET_CODE (op1) == SUBREG
 	  || (REG_P (op1)
 	      && REGNO (op1) >= FIRST_PSEUDO_REGISTER)
 	  || (code != CODE_FOR_nothing