Patchwork hw/9118.c: Implement active-low interrupt support

login
register
mail settings
Submitter Peter Maydell
Date May 26, 2011, 4:34 p.m.
Message ID <1306427651-3547-1-git-send-email-peter.maydell@linaro.org>
Download mbox | patch
Permalink /patch/97595/
State New
Headers show

Comments

Peter Maydell - May 26, 2011, 4:34 p.m.
The 9118 ethernet controller interrupt line is active low unless
the IRQ config register is programmed to set both the IRQ_POL
(polarity: active-high) and IRQ_TYPE (type: push-pull) bits:
implement support for inverting the irq output in other configurations.
This also requires that we support setting the bits in the first
place, and that we correctly preserve them across software reset.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---
The motivation for this patch is actually an omap3 platform (overo)
which uses the active-low configuration; the platforms in QEMU
mainline which use it (vexpress and realview) both configure the
chip to active-high, which is why this bug hasn't come to light
before. I've tested that (a) my overo platform works with the
change and (b) it doesn't regress vexpress.

 hw/lan9118.c |   12 +++++++++---
 1 files changed, 9 insertions(+), 3 deletions(-)
Peter Maydell - June 13, 2011, 9:41 p.m.
Ping?

On 26 May 2011 17:34, Peter Maydell <peter.maydell@linaro.org> wrote:
> The 9118 ethernet controller interrupt line is active low unless
> the IRQ config register is programmed to set both the IRQ_POL
> (polarity: active-high) and IRQ_TYPE (type: push-pull) bits:
> implement support for inverting the irq output in other configurations.
> This also requires that we support setting the bits in the first
> place, and that we correctly preserve them across software reset.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> The motivation for this patch is actually an omap3 platform (overo)
> which uses the active-low configuration; the platforms in QEMU
> mainline which use it (vexpress and realview) both configure the
> chip to active-high, which is why this bug hasn't come to light
> before. I've tested that (a) my overo platform works with the
> change and (b) it doesn't regress vexpress.
>
>  hw/lan9118.c |   12 +++++++++---
>  1 files changed, 9 insertions(+), 3 deletions(-)
>
> diff --git a/hw/lan9118.c b/hw/lan9118.c
> index 4c42fe9..3f3c05d 100644
> --- a/hw/lan9118.c
> +++ b/hw/lan9118.c
> @@ -228,6 +228,12 @@ static void lan9118_update(lan9118_state *s)
>     if ((s->irq_cfg & IRQ_EN) == 0) {
>         level = 0;
>     }
> +    if ((s->irq_cfg & (IRQ_TYPE | IRQ_POL)) != (IRQ_TYPE | IRQ_POL)) {
> +        /* Interrupt is active low unless we're configured as
> +         * active-high polarity, push-pull type.
> +         */
> +        level = !level;
> +    }
>     qemu_set_irq(s->irq, level);
>  }
>
> @@ -294,8 +300,7 @@ static void phy_reset(lan9118_state *s)
>  static void lan9118_reset(DeviceState *d)
>  {
>     lan9118_state *s = FROM_SYSBUS(lan9118_state, sysbus_from_qdev(d));
> -
> -    s->irq_cfg &= ~(IRQ_TYPE | IRQ_POL);
> +    s->irq_cfg &= (IRQ_TYPE | IRQ_POL);
>     s->int_sts = 0;
>     s->int_en = 0;
>     s->fifo_int = 0x48000000;
> @@ -904,7 +909,8 @@ static void lan9118_writel(void *opaque, target_phys_addr_t offset,
>     switch (offset) {
>     case CSR_IRQ_CFG:
>         /* TODO: Implement interrupt deassertion intervals.  */
> -        s->irq_cfg = (s->irq_cfg & IRQ_INT) | (val & IRQ_EN);
> +        val &= (IRQ_EN | IRQ_POL | IRQ_TYPE);
> +        s->irq_cfg = (s->irq_cfg & IRQ_INT) | val;
>         break;
>     case CSR_INT_STS:
>         s->int_sts &= ~val;
> --
> 1.7.1
andrzej zaborowski - June 16, 2011, 2:21 a.m.
Hi,

On 26 May 2011 18:34, Peter Maydell <peter.maydell@linaro.org> wrote:
> The 9118 ethernet controller interrupt line is active low unless
> the IRQ config register is programmed to set both the IRQ_POL
> (polarity: active-high) and IRQ_TYPE (type: push-pull) bits:
> implement support for inverting the irq output in other configurations.
> This also requires that we support setting the bits in the first
> place, and that we correctly preserve them across software reset.
>
> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
> ---
> The motivation for this patch is actually an omap3 platform (overo)
> which uses the active-low configuration; the platforms in QEMU
> mainline which use it (vexpress and realview) both configure the
> chip to active-high, which is why this bug hasn't come to light
> before. I've tested that (a) my overo platform works with the
> change and (b) it doesn't regress vexpress.

I pushed this patch, thanks.

Cheers

Patch

diff --git a/hw/lan9118.c b/hw/lan9118.c
index 4c42fe9..3f3c05d 100644
--- a/hw/lan9118.c
+++ b/hw/lan9118.c
@@ -228,6 +228,12 @@  static void lan9118_update(lan9118_state *s)
     if ((s->irq_cfg & IRQ_EN) == 0) {
         level = 0;
     }
+    if ((s->irq_cfg & (IRQ_TYPE | IRQ_POL)) != (IRQ_TYPE | IRQ_POL)) {
+        /* Interrupt is active low unless we're configured as
+         * active-high polarity, push-pull type.
+         */
+        level = !level;
+    }
     qemu_set_irq(s->irq, level);
 }
 
@@ -294,8 +300,7 @@  static void phy_reset(lan9118_state *s)
 static void lan9118_reset(DeviceState *d)
 {
     lan9118_state *s = FROM_SYSBUS(lan9118_state, sysbus_from_qdev(d));
-
-    s->irq_cfg &= ~(IRQ_TYPE | IRQ_POL);
+    s->irq_cfg &= (IRQ_TYPE | IRQ_POL);
     s->int_sts = 0;
     s->int_en = 0;
     s->fifo_int = 0x48000000;
@@ -904,7 +909,8 @@  static void lan9118_writel(void *opaque, target_phys_addr_t offset,
     switch (offset) {
     case CSR_IRQ_CFG:
         /* TODO: Implement interrupt deassertion intervals.  */
-        s->irq_cfg = (s->irq_cfg & IRQ_INT) | (val & IRQ_EN);
+        val &= (IRQ_EN | IRQ_POL | IRQ_TYPE);
+        s->irq_cfg = (s->irq_cfg & IRQ_INT) | val;
         break;
     case CSR_INT_STS:
         s->int_sts &= ~val;