@@ -410,6 +410,15 @@
(PFPO_RND_MODE_BFP 1)
])
+;; PPA constants
+
+; Immediate values which can be used as the third operand to the
+; perform processor assist instruction
+
+(define_constants
+ [(PPA_TX_ABORT 1)
+ (PPA_OOO_BARRIER 15)])
+
; Immediate operands for tbegin and tbeginc
(define_constants [(TBEGIN_MASK 65292)]) ; 0xff0c
(define_constants [(TBEGINC_MASK 65288)]) ; 0xff08
@@ -11415,7 +11424,7 @@
(define_expand "tx_assist"
[(unspec_volatile [(match_operand:SI 0 "register_operand" "")
(reg:SI GPR0_REGNUM)
- (const_int 1)]
+ (const_int PPA_TX_ABORT)]
UNSPECV_PPA)]
"TARGET_HTM"
"")
@@ -11425,7 +11434,7 @@
(match_operand:SI 1 "register_operand" "d")
(match_operand 2 "const_int_operand" "I")]
UNSPECV_PPA)]
- "TARGET_HTM && INTVAL (operands[2]) < 16"
+ "(TARGET_ZEC12 || TARGET_HTM) && INTVAL (operands[2]) < 16"
"ppa\t%0,%1,%2"
[(set_attr "op_type" "RRF")])
@@ -11592,3 +11601,11 @@
""
"bcr\t7,%%r0"
[(set_attr "op_type" "RR")])
+
+(define_expand "speculation_barrier"
+ [(unspec_volatile [(reg:SI GPR0_REGNUM)
+ (reg:SI GPR0_REGNUM)
+ (const_int PPA_OOO_BARRIER)]
+ UNSPECV_PPA)]
+ "TARGET_ZEC12"
+ "")