diff mbox series

[Aarch64] Testsuite patch to fix one of the regressions in PR 87433, gcc.target/aarch64/ashltidisi.c

Message ID 1537973045.18948.17.camel@cavium.com
State New
Headers show
Series [Aarch64] Testsuite patch to fix one of the regressions in PR 87433, gcc.target/aarch64/ashltidisi.c | expand

Commit Message

Steve Ellcey Sept. 26, 2018, 2:44 p.m. UTC
The patch for PR rtl-optimization/85160 which allowed combine to convert
two instructions into two different instructions if they had a lower cost
caused a couple of regressions on aarch64.  This patch fixes one of them.

After the above patch, the gcc.target/aarch64/ashltidisi.c test generated
3 asr instructions instead of 4.  Given that the overall test now has
two fewer instructions and appears to be superior to the original generated
code, this patch just updates the test to reflect the newly generated code.

Tested on aarch64, OK for checkin?

Steve Ellcey
sellcey@cavium.com


2018-09-26  Steve Ellcey  <sellcey@cavium.com>

	* gcc.target/aarch64/ashltidisi.c: Expect 3 asr instructions
	instead of 4.

Comments

Kyrill Tkachov Sept. 27, 2018, 11:18 a.m. UTC | #1
Hi Steve,

On 26/09/18 15:44, Steve Ellcey wrote:
>
> The patch for PR rtl-optimization/85160 which allowed combine to convert
> two instructions into two different instructions if they had a lower cost
> caused a couple of regressions on aarch64.  This patch fixes one of them.
>
> After the above patch, the gcc.target/aarch64/ashltidisi.c test generated
> 3 asr instructions instead of 4.  Given that the overall test now has
> two fewer instructions and appears to be superior to the original generated
> code, this patch just updates the test to reflect the newly generated code.
>
> Tested on aarch64, OK for checkin?
>
> Steve Ellcey
> sellcey@cavium.com
>
>
> 2018-09-26  Steve Ellcey  <sellcey@cavium.com>
>
>         * gcc.target/aarch64/ashltidisi.c: Expect 3 asr instructions
>         instead of 4.
>
>
> diff --git a/gcc/testsuite/gcc.target/aarch64/ashltidisi.c b/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
> index 293a0f2..e2a0997 100644
> --- a/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
> +++ b/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
> @@ -45,5 +45,5 @@ main (int argc, char **argv)
>    return 0;
>  }
>
> -/* { dg-final { scan-assembler-times "asr" 4 } } */
> +/* { dg-final { scan-assembler-times "asr" 3 } } */
>  /* { dg-final { scan-assembler-not "extr\t" } } */

This looks obvious to me.
Thanks,
Kyrill
Richard Earnshaw (lists) Sept. 28, 2018, 10:07 a.m. UTC | #2
On 26/09/18 15:44, Steve Ellcey wrote:
> 
> The patch for PR rtl-optimization/85160 which allowed combine to convert
> two instructions into two different instructions if they had a lower cost
> caused a couple of regressions on aarch64.  This patch fixes one of them.
> 
> After the above patch, the gcc.target/aarch64/ashltidisi.c test generated
> 3 asr instructions instead of 4.  Given that the overall test now has
> two fewer instructions and appears to be superior to the original generated
> code, this patch just updates the test to reflect the newly generated code.
> 
> Tested on aarch64, OK for checkin?
> 
> Steve Ellcey
> sellcey@cavium.com
> 
> 
> 2018-09-26  Steve Ellcey  <sellcey@cavium.com>
> 
> 	* gcc.target/aarch64/ashltidisi.c: Expect 3 asr instructions
> 	instead of 4.
> 
> 
> diff --git a/gcc/testsuite/gcc.target/aarch64/ashltidisi.c b/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
> index 293a0f2..e2a0997 100644
> --- a/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
> +++ b/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
> @@ -45,5 +45,5 @@ main (int argc, char **argv)
>    return 0;
>  }
>  
> -/* { dg-final { scan-assembler-times "asr" 4 } } */
> +/* { dg-final { scan-assembler-times "asr" 3 } } */
>  /* { dg-final { scan-assembler-not "extr\t" } } */
> 

OK.
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/aarch64/ashltidisi.c b/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
index 293a0f2..e2a0997 100644
--- a/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
+++ b/gcc/testsuite/gcc.target/aarch64/ashltidisi.c
@@ -45,5 +45,5 @@  main (int argc, char **argv)
   return 0;
 }
 
-/* { dg-final { scan-assembler-times "asr" 4 } } */
+/* { dg-final { scan-assembler-times "asr" 3 } } */
 /* { dg-final { scan-assembler-not "extr\t" } } */