Message ID | 201105250030.07953.ebotcazou@adacore.com |
---|---|
State | New |
Headers | show |
-----BEGIN PGP SIGNED MESSAGE----- Hash: SHA1 On 05/24/11 16:30, Eric Botcazou wrote: > The new save slot sharing algorithm has a documented limitation: > > Future work: > > In the fallback case we should iterate backwards across all possible > modes for the save, choosing the largest available one instead of > falling back to the smallest mode immediately. (eg TF -> DF -> SF). That's not new -- I wrote that circa 1992/1993. The whole point behind the changes from ~1992 was to try and use DFmode insns when caller-saving FP regs on the sparc. However, I didn't think it was worth the effort to deal with that case (TF -> DF -> SF). The code tries to build a save/restore insn of MOVE_MAX_WORDS size and if that fails, then it drops back to WORD_SIZE IIRC. > that is annoying for the SPARC when it comes to floating-point code because the > floating-point registers are single (SF) but there is a fully-fledged support > for double (DF) arithmetics in the architecture. So saving registers on an > individual basis really pessimizes here. For example, the size of the object > generated for the Ada unit a-nlcefu.ads at -O2 decreases from 96080 to 95088 > bytes when you pass -fno-ira-share-save-slots. It's the new slot sharing code that doesn't have support for saving larger hunks. Having written the original code to handle larger saves specifically to help sparc, I can certainly understand why the new code is causing you grief :-) > > Experiments have shown that the impact on integer code is null in terms of code > size and negligible in terms of stack usage (-fstack-usage reports 8/16 bytes > increase for most functions). Therefore this patch disables the option by > default for the SPARC. Boostrapped/regtested on SPARC/Solaris, applied on the > mainline and 4.6 branch. > > > Jeff, I'd like to apply it to the 4.5 branch as well, but I need your patch: > > 2011-01-21 Jeff Law <law@redhat.com> > > PR rtl-optimization/41619 > * caller-save.c (setup_save_areas): Break out code to determine > which hard regs are live across calls by examining the reload chains > so that it is always used. > Eliminate code which checked REG_N_CALLS_CROSSED. > > Do you have any objections to me backporting it to the branch? No objections at all. I don't believe there were any follow-up patches and all the change did was make more of the paths through caller-save consistent in how they determined what needed to be saved. jeff -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) Comment: Using GnuPG with Fedora - http://enigmail.mozdev.org/ iQEcBAEBAgAGBQJN3SihAAoJEBRtltQi2kC7bnsH/10X0fDwfHtt8b16js5nZHZ8 n+f6TPlAuAu1vJ5h4YI7afybMMfBfHAbvTLwtD+f37boreTQU1wizVH4JLC4GgMS KP9vB48mK/wHli0Hze37QAxVcQt8CPCr3d1fJtpVp6CNUp1gzLWkqT2GjUmxTxfX M3qQ7wRot0cfvVDx8upOj3Yr9tih/c/vIm5ez49s8fzha2acSpEB0vFFj3gcx3EO C3Mgu6z1ZVskIP5KOUIV/2EhtXHMoC4dxsodurfvtGafK5gmbaqVSipzZlKj4BSg Oc4XPKAy07/cSxQhx94pYFB8+Jr7TC99Yubgq2v2gJitf+99AW9MCWmnEvLfX2A= =w6DV -----END PGP SIGNATURE-----
> It's the new slot sharing code that doesn't have support for saving > larger hunks. Having written the original code to handle larger saves > specifically to help sparc, I can certainly understand why the new code > is causing you grief :-) Thanks for the historical perspective. :-) > No objections at all. I don't believe there were any follow-up patches > and all the change did was make more of the paths through caller-save > consistent in how they determined what needed to be saved. OK, now backported after bootstrapping/regtesting on i586-suse-linux.
Index: config/sparc/sparc.c =================================================================== --- config/sparc/sparc.c (revision 174058) +++ config/sparc/sparc.c (working copy) @@ -933,6 +933,12 @@ sparc_option_override (void) ? 64 : 32), global_options.x_param_values, global_options_set.x_param_values); + + /* Disable save slot sharing for call-clobbered registers by default. + The IRA sharing algorithm works on single registers only and this + pessimizes for double floating-point registers. */ + if (!global_options_set.x_flag_ira_share_save_slots) + flag_ira_share_save_slots = 0; } /* Miscellaneous utilities. */