Message ID | 1537302461.19375.15.camel@brimstone.rchland.ibm.com |
---|---|
State | New |
Headers | show |
Series | [rs6000] Fix PR86952 (p8-vec-xl-xst-v2.c) | expand |
On Tue, 2018-09-18 at 15:27 -0500, Will Schmidt wrote: > Hi, > > The expected codegen for this testcase with target {le} and > option -mcpu=power8 is lxvd2x and stxvd2x. It was initially > committed with contents as seen on builds for P7, which was > incorrect. Update as is appropriate. > > [testsuite] > > 2018-09-18 Will Schmidt <will_schmidt@vnet.ibm.com> > > PR testsuite/86952 nuts, sorry, this should have been pr testsuite 86592. let me try this again....
diff --git a/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst-v2.c b/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst-v2.c index cc68ceb..6f48d72 100644 --- a/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst-v2.c +++ b/gcc/testsuite/gcc.target/powerpc/p8-vec-xl-xst-v2.c @@ -57,8 +57,7 @@ void bartle (vector unsigned short x, unsigned short * address) { vec_xst (x, 0, address); } -/* { dg-final { scan-assembler-times "lvx" 4 } } */ -/* { dg-final { scan-assembler-times "stvx" 4 } } */ -/* { dg-final { scan-assembler-times "xxpermdi" 0 } } */ +/* { dg-final { scan-assembler-times {\mlxvd2x\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mstxvd2x\M} 4 } } */