[1/2,ARC] Check for odd-even register when emitting double mac ops.

Avoid generate dmac instructions when the register is not odd-even,
use instead the equivalent mac instruction.

gcc/
	Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (maddsidi4_split): Don't use dmac if the
	destination register is not odd-even.
	(umaddsidi4_split): Likewise.

gcc/testsuite/
	Claudiu Zissulescu  <claziss@synopsys.com>

	* gcc.target/arc/tmac-3.c: New file.
---
 gcc/config/arc/arc.md                 |  4 ++--
 gcc/testsuite/gcc.target/arc/tmac-3.c | 17 +++++++++++++++++
 2 files changed, 19 insertions(+), 2 deletions(-)
 create mode 100644 gcc/testsuite/gcc.target/arc/tmac-3.c

* Claudiu Zissulescu <claziss@gmail.com> [2018-09-17 15:50:26 +0300]:

> Avoid generate dmac instructions when the register is not odd-even,
> use instead the equivalent mac instruction.
> 
> gcc/
> 	Claudiu Zissulescu  <claziss@synopsys.com>
> 
> 	* config/arc/arc.md (maddsidi4_split): Don't use dmac if the
> 	destination register is not odd-even.
> 	(umaddsidi4_split): Likewise.
> 
> gcc/testsuite/
> 	Claudiu Zissulescu  <claziss@synopsys.com>
> 
> 	* gcc.target/arc/tmac-3.c: New file.

Looks good thanks, with one minor nit below...

> ---
>  gcc/config/arc/arc.md                 |  4 ++--
>  gcc/testsuite/gcc.target/arc/tmac-3.c | 17 +++++++++++++++++
>  2 files changed, 19 insertions(+), 2 deletions(-)
>  create mode 100644 gcc/testsuite/gcc.target/arc/tmac-3.c
> 
> diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
> index dbcd7098bec..2d108ef166d 100644
> --- a/gcc/config/arc/arc.md
> +++ b/gcc/config/arc/arc.md
> @@ -6078,7 +6078,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
>    "{
>     rtx acc_reg = gen_rtx_REG (DImode, ACC_REG_FIRST);
>     emit_move_insn (acc_reg, operands[3]);
> -   if (TARGET_PLUS_MACD)
> +   if (TARGET_PLUS_MACD && even_register_operand (operands[0], DImode))
>       emit_insn (gen_macd (operands[0], operands[1], operands[2]));
>     else
>       {
> @@ -6178,7 +6178,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
>    "{
>     rtx acc_reg = gen_rtx_REG (DImode, ACC_REG_FIRST);
>     emit_move_insn (acc_reg, operands[3]);
> -   if (TARGET_PLUS_MACD)
> +   if (TARGET_PLUS_MACD && even_register_operand (operands[0], DImode))
>       emit_insn (gen_macdu (operands[0], operands[1], operands[2]));
>     else
>       {
> diff --git a/gcc/testsuite/gcc.target/arc/tmac-3.c b/gcc/testsuite/gcc.target/arc/tmac-3.c
> new file mode 100644
> index 00000000000..3c8c1201f83
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/arc/tmac-3.c
> @@ -0,0 +1,17 @@
> +/* { dg-do compile } */
> +/* { dg-skip-if "" { ! { clmcpu } } } */
> +/* { dg-options "-mcpu=hs38 -Os" } */
> +
> +/* The compiler will assign r1r2 as a DI register, but it doesn't fit
> +   the macd operation, hence we need to fall back on the mac
> +   instruction.  */
> +typedef long long myint64_t;
> +
> +extern int d (int, myint64_t);
> +int b (int c)
> +{
> +  int x = (int) d;
> +  d(c, (myint64_t)x * 2 + 1);

Could you apply GNU coding standard whitespace on this line please.

Thanks,
Andrew

> +}
> +
> +/* { dg-final { scan-assembler "mac\\\s+r1" } } */
> -- 
> 2.17.1
>

Pushed with suggested changes.

Thank you for your review,
Claudiu
On Thu, Sep 20, 2018 at 11:59 PM Andrew Burgess
<andrew.burgess@embecosm.com> wrote:
>
> * Claudiu Zissulescu <claziss@gmail.com> [2018-09-17 15:50:26 +0300]:
>
> > Avoid generate dmac instructions when the register is not odd-even,
> > use instead the equivalent mac instruction.
> >
> > gcc/
> >       Claudiu Zissulescu  <claziss@synopsys.com>
> >
> >       * config/arc/arc.md (maddsidi4_split): Don't use dmac if the
> >       destination register is not odd-even.
> >       (umaddsidi4_split): Likewise.
> >
> > gcc/testsuite/
> >       Claudiu Zissulescu  <claziss@synopsys.com>
> >
> >       * gcc.target/arc/tmac-3.c: New file.
>
> Looks good thanks, with one minor nit below...
>
> > ---
> >  gcc/config/arc/arc.md                 |  4 ++--
> >  gcc/testsuite/gcc.target/arc/tmac-3.c | 17 +++++++++++++++++
> >  2 files changed, 19 insertions(+), 2 deletions(-)
> >  create mode 100644 gcc/testsuite/gcc.target/arc/tmac-3.c
> >
> > diff --git a/gcc/config/arc/arc.md b/gcc/config/arc/arc.md
> > index dbcd7098bec..2d108ef166d 100644
> > --- a/gcc/config/arc/arc.md
> > +++ b/gcc/config/arc/arc.md
> > @@ -6078,7 +6078,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
> >    "{
> >     rtx acc_reg = gen_rtx_REG (DImode, ACC_REG_FIRST);
> >     emit_move_insn (acc_reg, operands[3]);
> > -   if (TARGET_PLUS_MACD)
> > +   if (TARGET_PLUS_MACD && even_register_operand (operands[0], DImode))
> >       emit_insn (gen_macd (operands[0], operands[1], operands[2]));
> >     else
> >       {
> > @@ -6178,7 +6178,7 @@ core_3, archs4x, archs4xd, archs4xd_slow"
> >    "{
> >     rtx acc_reg = gen_rtx_REG (DImode, ACC_REG_FIRST);
> >     emit_move_insn (acc_reg, operands[3]);
> > -   if (TARGET_PLUS_MACD)
> > +   if (TARGET_PLUS_MACD && even_register_operand (operands[0], DImode))
> >       emit_insn (gen_macdu (operands[0], operands[1], operands[2]));
> >     else
> >       {
> > diff --git a/gcc/testsuite/gcc.target/arc/tmac-3.c b/gcc/testsuite/gcc.target/arc/tmac-3.c
> > new file mode 100644
> > index 00000000000..3c8c1201f83
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/arc/tmac-3.c
> > @@ -0,0 +1,17 @@
> > +/* { dg-do compile } */
> > +/* { dg-skip-if "" { ! { clmcpu } } } */
> > +/* { dg-options "-mcpu=hs38 -Os" } */
> > +
> > +/* The compiler will assign r1r2 as a DI register, but it doesn't fit
> > +   the macd operation, hence we need to fall back on the mac
> > +   instruction.  */
> > +typedef long long myint64_t;
> > +
> > +extern int d (int, myint64_t);
> > +int b (int c)
> > +{
> > +  int x = (int) d;
> > +  d(c, (myint64_t)x * 2 + 1);
>
> Could you apply GNU coding standard whitespace on this line please.
>
> Thanks,
> Andrew
>
> > +}
> > +
> > +/* { dg-final { scan-assembler "mac\\\s+r1" } } */
> > --
> > 2.17.1
> >