From patchwork Mon May 23 20:28:32 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 97046 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id A27F7B6FBE for ; Tue, 24 May 2011 06:34:50 +1000 (EST) Received: from localhost ([::1]:48787 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QObpv-0004ok-QZ for incoming@patchwork.ozlabs.org; Mon, 23 May 2011 16:34:47 -0400 Received: from eggs.gnu.org ([140.186.70.92]:42758) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QObkZ-00058R-30 for qemu-devel@nongnu.org; Mon, 23 May 2011 16:29:15 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QObkY-0008LQ-5Y for qemu-devel@nongnu.org; Mon, 23 May 2011 16:29:14 -0400 Received: from mail-gx0-f173.google.com ([209.85.161.173]:34382) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QObkX-0008Gg-W1 for qemu-devel@nongnu.org; Mon, 23 May 2011 16:29:14 -0400 Received: by mail-gx0-f173.google.com with SMTP id 26so2727982gxk.4 for ; Mon, 23 May 2011 13:29:13 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:message-id:x-mailer :in-reply-to:references; bh=Ri46tWZMzJEsp8HV+bskosk0D/d+yLPbIMFhUYi0ekk=; b=PJxtiSRVS3A64sHQeHS9rVKjP41OuWjDrjtJO3/yGYqvdbn9Y329iXl0uvr4rk+dUj 4PuOM1eJ3TgjyDnBUhdHFoyT2OVXwrj6HuCwmUIntaDLhcuzspvgR5e34OxCyLJlBIKY k36pnT1Gg7okGVvI4DtTAOET8kEvP9IygShwI= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:message-id:x-mailer:in-reply-to :references; b=N3KsE4SPpmpPXQrZLVvwuvsjAMX7gj/a0BqMoioU1FTv2NV4/ELkfpd9gBAap1BnqD chGeNayfzhBoXDM4BN6brmFIgT9iVV/j7fk9qn1c6z4Tr1mYEkMB9ooOy+EfahSdc7b3 cE9W8yRsLfvWS9LxfQlfK0CjGaA3t8Nl+xL6U= Received: by 10.91.21.1 with SMTP id y1mr3435272agi.169.1306182553744; Mon, 23 May 2011 13:29:13 -0700 (PDT) Received: from localhost.localdomain (c-71-227-161-214.hsd1.wa.comcast.net [71.227.161.214]) by mx.google.com with ESMTPS id e9sm5033668ann.24.2011.05.23.13.29.12 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 23 May 2011 13:29:13 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 23 May 2011 13:28:32 -0700 Message-Id: <1306182526-12081-13-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1306182526-12081-1-git-send-email-rth@twiddle.net> References: <1306182526-12081-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.161.173 Subject: [Qemu-devel] [PATCH 12/26] target-alpha: Tidy up arithmetic exceptions. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Introduce and use arith_excp, filling in the trap_arg[01] IPRs. Signed-off-by: Richard Henderson --- target-alpha/op_helper.c | 34 +++++++++++++++++++++------------- 1 files changed, 21 insertions(+), 13 deletions(-) diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c index 73e5805..672940e 100644 --- a/target-alpha/op_helper.c +++ b/target-alpha/op_helper.c @@ -32,6 +32,15 @@ void QEMU_NORETURN helper_excp (int excp, int error) cpu_loop_exit(); } +static void QEMU_NORETURN arith_excp(int exc, uint64_t mask) +{ + env->exception_index = EXCP_ARITH; + env->error_code = 0; + env->trap_arg0 = exc; + env->trap_arg1 = mask; + cpu_loop_exit(); +} + uint64_t helper_load_pcc (void) { /* ??? This isn't a timer for which we have any rate info. */ @@ -53,7 +62,7 @@ uint64_t helper_addqv (uint64_t op1, uint64_t op2) uint64_t tmp = op1; op1 += op2; if (unlikely((tmp ^ op2 ^ (-1ULL)) & (tmp ^ op1) & (1ULL << 63))) { - helper_excp(EXCP_ARITH, EXC_M_IOV); + arith_excp(EXC_M_IOV, 0); } return op1; } @@ -63,7 +72,7 @@ uint64_t helper_addlv (uint64_t op1, uint64_t op2) uint64_t tmp = op1; op1 = (uint32_t)(op1 + op2); if (unlikely((tmp ^ op2 ^ (-1UL)) & (tmp ^ op1) & (1UL << 31))) { - helper_excp(EXCP_ARITH, EXC_M_IOV); + arith_excp(EXC_M_IOV, 0); } return op1; } @@ -73,7 +82,7 @@ uint64_t helper_subqv (uint64_t op1, uint64_t op2) uint64_t res; res = op1 - op2; if (unlikely((op1 ^ op2) & (res ^ op1) & (1ULL << 63))) { - helper_excp(EXCP_ARITH, EXC_M_IOV); + arith_excp(EXC_M_IOV, 0); } return res; } @@ -83,7 +92,7 @@ uint64_t helper_sublv (uint64_t op1, uint64_t op2) uint32_t res; res = op1 - op2; if (unlikely((op1 ^ op2) & (res ^ op1) & (1UL << 31))) { - helper_excp(EXCP_ARITH, EXC_M_IOV); + arith_excp(EXC_M_IOV, 0); } return res; } @@ -93,7 +102,7 @@ uint64_t helper_mullv (uint64_t op1, uint64_t op2) int64_t res = (int64_t)op1 * (int64_t)op2; if (unlikely((int32_t)res != res)) { - helper_excp(EXCP_ARITH, EXC_M_IOV); + arith_excp(EXC_M_IOV, 0); } return (int64_t)((int32_t)res); } @@ -105,7 +114,7 @@ uint64_t helper_mulqv (uint64_t op1, uint64_t op2) muls64(&tl, &th, op1, op2); /* If th != 0 && th != -1, then we had an overflow */ if (unlikely((th + 1) > 1)) { - helper_excp(EXCP_ARITH, EXC_M_IOV); + arith_excp(EXC_M_IOV, 0); } return tl; } @@ -373,8 +382,6 @@ void helper_fp_exc_raise(uint32_t exc, uint32_t regno) if (exc) { uint32_t hw_exc = 0; - env->trap_arg1 = 1ull << regno; - if (exc & float_flag_invalid) { hw_exc |= EXC_M_INV; } @@ -390,7 +397,8 @@ void helper_fp_exc_raise(uint32_t exc, uint32_t regno) if (exc & float_flag_inexact) { hw_exc |= EXC_M_INE; } - helper_excp(EXCP_ARITH, hw_exc); + + arith_excp(hw_exc, 1ull << regno); } } @@ -420,7 +428,7 @@ uint64_t helper_ieee_input(uint64_t val) if (env->fpcr_dnz) { val &= 1ull << 63; } else { - helper_excp(EXCP_ARITH, EXC_M_UNF); + arith_excp(EXC_M_UNF, 0); } } } else if (exp == 0x7ff) { @@ -428,7 +436,7 @@ uint64_t helper_ieee_input(uint64_t val) /* ??? I'm not sure these exception bit flags are correct. I do know that the Linux kernel, at least, doesn't rely on them and just emulates the insn to figure out what exception to use. */ - helper_excp(EXCP_ARITH, frac ? EXC_M_INV : EXC_M_FOV); + arith_excp(frac ? EXC_M_INV : EXC_M_FOV, 0); } return val; } @@ -445,12 +453,12 @@ uint64_t helper_ieee_input_cmp(uint64_t val) if (env->fpcr_dnz) { val &= 1ull << 63; } else { - helper_excp(EXCP_ARITH, EXC_M_UNF); + arith_excp(EXC_M_UNF, 0); } } } else if (exp == 0x7ff && frac) { /* NaN. */ - helper_excp(EXCP_ARITH, EXC_M_INV); + arith_excp(EXC_M_INV, 0); } return val; }