From patchwork Mon May 23 20:28:28 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Richard Henderson X-Patchwork-Id: 97037 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 4FE5DB6FB7 for ; Tue, 24 May 2011 06:30:45 +1000 (EST) Received: from localhost ([::1]:53519 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QObly-0006s5-Kq for incoming@patchwork.ozlabs.org; Mon, 23 May 2011 16:30:42 -0400 Received: from eggs.gnu.org ([140.186.70.92]:42689) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QObkT-0004uZ-24 for qemu-devel@nongnu.org; Mon, 23 May 2011 16:29:09 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1QObkS-0008K3-7H for qemu-devel@nongnu.org; Mon, 23 May 2011 16:29:09 -0400 Received: from mail-gx0-f173.google.com ([209.85.161.173]:34382) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1QObkS-0008Gg-4v for qemu-devel@nongnu.org; Mon, 23 May 2011 16:29:08 -0400 Received: by mail-gx0-f173.google.com with SMTP id 26so2727982gxk.4 for ; Mon, 23 May 2011 13:29:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:sender:from:to:subject:date:message-id:x-mailer :in-reply-to:references; bh=h7b+Hl8EMvL4iuKNSyYJigM1JlSp9PiwOFyw04yqcMQ=; b=FE7rFqzBsLwAe7zqwU/0SqChoO8mYwqrklSntPuLe85k2qgCtXS0nOhK6LbiPUz45T ugf+Nz36ZiHuxxegNdx5jalgLZXHaztE0wcnzERkldEhnQZhF9nnx4y41DZYEM+mocph XSIs16XWvzBA0N3uED5GTZonpch6poxyLnXd8= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=sender:from:to:subject:date:message-id:x-mailer:in-reply-to :references; b=ER+/ATd9m21nzEECJ9N3e0aK3ebA3VX+an/yv47ZbEapbi+d93h7nBTU8pOXQaIZn/ cWrFeb3ICo30rPWhVLtDl3O/D7EdkfgIqe1fXAJLUnWqQSB9HxY1bPazkI2Abdc9i1Q3 rgWcctHTCO5XQ4YKzmmHIScxZvkxQXpml26hc= Received: by 10.101.152.37 with SMTP id e37mr4874295ano.124.1306182547953; Mon, 23 May 2011 13:29:07 -0700 (PDT) Received: from localhost.localdomain (c-71-227-161-214.hsd1.wa.comcast.net [71.227.161.214]) by mx.google.com with ESMTPS id e9sm5033668ann.24.2011.05.23.13.29.06 (version=TLSv1/SSLv3 cipher=OTHER); Mon, 23 May 2011 13:29:07 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Mon, 23 May 2011 13:28:28 -0700 Message-Id: <1306182526-12081-9-git-send-email-rth@twiddle.net> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1306182526-12081-1-git-send-email-rth@twiddle.net> References: <1306182526-12081-1-git-send-email-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 2) X-Received-From: 209.85.161.173 Subject: [Qemu-devel] [PATCH 08/26] target-alpha: Merge HW_REI and HW_RET implementations. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Signed-off-by: Richard Henderson --- target-alpha/helper.h | 1 - target-alpha/op_helper.c | 10 ---------- target-alpha/translate.c | 19 ++++++++----------- 3 files changed, 8 insertions(+), 22 deletions(-) diff --git a/target-alpha/helper.h b/target-alpha/helper.h index f4f693a..de86ff2 100644 --- a/target-alpha/helper.h +++ b/target-alpha/helper.h @@ -100,7 +100,6 @@ DEF_HELPER_1(ieee_input_cmp, i64, i64) DEF_HELPER_1(ieee_input_s, i64, i64) #if !defined (CONFIG_USER_ONLY) -DEF_HELPER_0(hw_rei, void) DEF_HELPER_1(hw_ret, void, i64) DEF_HELPER_2(mfpr, i64, int, i64) DEF_HELPER_2(mtpr, void, int, i64) diff --git a/target-alpha/op_helper.c b/target-alpha/op_helper.c index a90c7a6..ea11cd2 100644 --- a/target-alpha/op_helper.c +++ b/target-alpha/op_helper.c @@ -1156,22 +1156,12 @@ uint64_t helper_cvtqg (uint64_t a) /* PALcode support special instructions */ #if !defined (CONFIG_USER_ONLY) -void helper_hw_rei (void) -{ - env->pc = env->ipr[IPR_EXC_ADDR] & ~3; - env->ipr[IPR_EXC_ADDR] = env->ipr[IPR_EXC_ADDR] & 1; - env->intr_flag = 0; - env->lock_addr = -1; - /* XXX: re-enable interrupts and memory mapping */ -} - void helper_hw_ret (uint64_t a) { env->pc = a & ~3; env->ipr[IPR_EXC_ADDR] = a & 1; env->intr_flag = 0; env->lock_addr = -1; - /* XXX: re-enable interrupts and memory mapping */ } uint64_t helper_mfpr (int iprn, uint64_t val) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index 2c0b9c2..2559814 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -2876,25 +2876,22 @@ static ExitStatus translate_one(DisasContext *ctx, uint32_t insn) break; #endif case 0x1E: - /* HW_REI (PALcode) */ + /* HW_RET (PALcode) */ #if defined (CONFIG_USER_ONLY) goto invalid_opc; #else if (!ctx->pal_mode) goto invalid_opc; if (rb == 31) { - /* "Old" alpha */ - gen_helper_hw_rei(); - } else { - TCGv tmp; - - if (ra != 31) { - tmp = tcg_temp_new(); - tcg_gen_addi_i64(tmp, cpu_ir[rb], (((int64_t)insn << 51) >> 51)); - } else - tmp = tcg_const_i64(((int64_t)insn << 51) >> 51); + /* Pre-EV6 CPUs interpreted this as HW_REI, loading the return + address from EXC_ADDR. This turns out to be useful for our + emulation PALcode, so continue to accept it. */ + TCGv tmp = tcg_temp_new(); + tcg_gen_ld_i64(tmp, cpu_env, offsetof(CPUState, ipr[IPR_EXC_ADDR])); gen_helper_hw_ret(tmp); tcg_temp_free(tmp); + } else { + gen_helper_hw_ret(cpu_ir[rb]); } ret = EXIT_PC_UPDATED; break;