diff mbox series

pinctrl: cannonlake: Fix gpio base for GPP-E

Message ID 20180915211518.8155-1-s@sd.ai
State New
Headers show
Series pinctrl: cannonlake: Fix gpio base for GPP-E | expand

Commit Message

Simon Detheridge Sept. 15, 2018, 9:15 p.m. UTC
The gpio base for GPP-E was set incorrectly to 258 instead of 256,
preventing the touchpad working on my Tong Fang GK5CN5Z laptop.

Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=200787
Signed-off-by: Simon Detheridge <s@sd.ai>
---
 drivers/pinctrl/intel/pinctrl-cannonlake.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Mika Westerberg Sept. 17, 2018, 8:19 a.m. UTC | #1
On Sat, Sep 15, 2018 at 10:15:18PM +0100, Simon Detheridge wrote:
> The gpio base for GPP-E was set incorrectly to 258 instead of 256,
> preventing the touchpad working on my Tong Fang GK5CN5Z laptop.
> 
> Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=200787
> Signed-off-by: Simon Detheridge <s@sd.ai>

Indeed, you are correct.

Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Linus Walleij Sept. 18, 2018, 11:34 p.m. UTC | #2
On Sat, Sep 15, 2018 at 2:16 PM Simon Detheridge <s@sd.ai> wrote:

> The gpio base for GPP-E was set incorrectly to 258 instead of 256,
> preventing the touchpad working on my Tong Fang GK5CN5Z laptop.
>
> Buglink: https://bugzilla.kernel.org/show_bug.cgi?id=200787
> Signed-off-by: Simon Detheridge <s@sd.ai>

Patch applied for fixes.

It seems I should tag it for stable too.

Yours,
Linus Walleij
diff mbox series

Patch

diff --git a/drivers/pinctrl/intel/pinctrl-cannonlake.c b/drivers/pinctrl/intel/pinctrl-cannonlake.c
index fb1afe55bf53..8d48371caaa2 100644
--- a/drivers/pinctrl/intel/pinctrl-cannonlake.c
+++ b/drivers/pinctrl/intel/pinctrl-cannonlake.c
@@ -379,7 +379,7 @@  static const struct intel_padgroup cnlh_community1_gpps[] = {
 static const struct intel_padgroup cnlh_community3_gpps[] = {
 	CNL_GPP(0, 155, 178, 192),		/* GPP_K */
 	CNL_GPP(1, 179, 202, 224),		/* GPP_H */
-	CNL_GPP(2, 203, 215, 258),		/* GPP_E */
+	CNL_GPP(2, 203, 215, 256),		/* GPP_E */
 	CNL_GPP(3, 216, 239, 288),		/* GPP_F */
 	CNL_GPP(4, 240, 248, CNL_NO_GPIO),	/* SPI */
 };