[RFC,09/11] powerpc/tm: Do not restore default DSCR

Message ID 1536781219-13938-10-git-send-email-leitao@debian.org
State New
Headers show
Series
  • New TM Model
Related show

Checks

Context Check Description
snowpatch_ozlabs/checkpatch success Test checkpatch on branch next
snowpatch_ozlabs/apply_patch success next/apply_patch Successfully applied

Commit Message

Breno Leitao Sept. 12, 2018, 7:40 p.m.
In the previous TM code, trecheckpoint was being executed in the middle of
an exception, thus, DSCR was being restored to default kernel DSCR value
after trecheckpoint was done.

With this current patchset, trecheckpoint is executed just before getting
to userspace, at ret_from_except_lite, for example. Thus, we do not need to
set default kernel DSCR value anymore, as we are leaving kernel space.  It
is OK to keep the checkpointed DSCR value into the live SPR, mainly because
the transaction is doomed and it will fail soon (after RFID), so,
continuing with the pre-checkpointed DSCR value is what seems correct.

That said, we must set the DSCR value that will be used in userspace now.
Current trecheckpoint() function sets it to the pre-checkpointed value
prior to lines being changed in this patch, so, removing these lines would
keep the pre-checkpointed values.

Important to say that we do not need to do the same thing with tm_reclaim,
since it already set the DSCR to the default value, after TRECLAIM is
called, in the following lines:

        /* Load CPU's default DSCR */
        ld      r0, PACA_DSCR_DEFAULT(r13)
        mtspr   SPRN_DSCR, r0

Signed-off-by: Breno Leitao <leitao@debian.org>
---
 arch/powerpc/kernel/tm.S | 4 ----
 1 file changed, 4 deletions(-)

Comments

Michael Neuling Sept. 18, 2018, 5:41 a.m. | #1
On Wed, 2018-09-12 at 16:40 -0300, Breno Leitao wrote:
> In the previous TM code, trecheckpoint was being executed in the middle of
> an exception, thus, DSCR was being restored to default kernel DSCR value
> after trecheckpoint was done.
> 
> With this current patchset, trecheckpoint is executed just before getting
> to userspace, at ret_from_except_lite, for example. Thus, we do not need to
> set default kernel DSCR value anymore, as we are leaving kernel space.  It
> is OK to keep the checkpointed DSCR value into the live SPR, mainly because
> the transaction is doomed and it will fail soon (after RFID), 

What if we are going back to a suspended transaction?  It will remain live until
userspace does a tresume

> so,
> continuing with the pre-checkpointed DSCR value is what seems correct.

Reading this description suggests this patch isn't really needed. Right?

Mikey

> That said, we must set the DSCR value that will be used in userspace now.
> Current trecheckpoint() function sets it to the pre-checkpointed value
> prior to lines being changed in this patch, so, removing these lines would
> keep the pre-checkpointed values.
> 
> Important to say that we do not need to do the same thing with tm_reclaim,
> since it already set the DSCR to the default value, after TRECLAIM is
> called, in the following lines:
> 
>         /* Load CPU's default DSCR */
>         ld      r0, PACA_DSCR_DEFAULT(r13)
>         mtspr   SPRN_DSCR, r0
> 
> Signed-off-by: Breno Leitao <leitao@debian.org>
> ---
>  arch/powerpc/kernel/tm.S | 4 ----
>  1 file changed, 4 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
> index 6bffbc5affe7..5427eda69846 100644
> --- a/arch/powerpc/kernel/tm.S
> +++ b/arch/powerpc/kernel/tm.S
> @@ -493,10 +493,6 @@ restore_gprs:
>  	mtlr	r0
>  	ld	r2, STK_GOT(r1)
>  
> -	/* Load CPU's default DSCR */
> -	ld	r0, PACA_DSCR_DEFAULT(r13)
> -	mtspr	SPRN_DSCR, r0
> -
>  	blr
>  
>  	/* ****************************************************************** */

Patch

diff --git a/arch/powerpc/kernel/tm.S b/arch/powerpc/kernel/tm.S
index 6bffbc5affe7..5427eda69846 100644
--- a/arch/powerpc/kernel/tm.S
+++ b/arch/powerpc/kernel/tm.S
@@ -493,10 +493,6 @@  restore_gprs:
 	mtlr	r0
 	ld	r2, STK_GOT(r1)
 
-	/* Load CPU's default DSCR */
-	ld	r0, PACA_DSCR_DEFAULT(r13)
-	mtspr	SPRN_DSCR, r0
-
 	blr
 
 	/* ****************************************************************** */