From patchwork Wed Sep 12 09:52:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 968932 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 429HDk3mFPz9sBZ for ; Wed, 12 Sep 2018 19:54:14 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="g5+Wzyxc"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 429HDk1kvRzF314 for ; Wed, 12 Sep 2018 19:54:14 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="g5+Wzyxc"; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::443; helo=mail-pf1-x443.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="g5+Wzyxc"; dkim-atps=neutral Received: from mail-pf1-x443.google.com (mail-pf1-x443.google.com [IPv6:2607:f8b0:4864:20::443]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 429HCT3QVDzF31Z for ; Wed, 12 Sep 2018 19:53:09 +1000 (AEST) Received: by mail-pf1-x443.google.com with SMTP id d4-v6so770511pfn.0 for ; Wed, 12 Sep 2018 02:53:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0pShKvT5/yzFZP2AVSFOZ7sK5bvOSCYxtvGTUy4qix8=; b=g5+Wzyxcn95IzVJ8FAZm0quw4rXABdfXHLGstvsVNsTiKo9BAleC+ljNjgba00+CxW uJp4Z/aI3Ptl/01XqqGk0L9ach4SkZ//sBS8Je+Zqpqq1BI3fpPZ80vKeaoKcdY0p5sE s0IfJGBtTH5TjvUN8CPXizGaiOJ/HLJjU2xxfl0caHBNnVUVZD31TvGHg8WWpUL/dZIz dTlOhTQH6+X6LfwAlMNt+b2Rd1mxjqR9BcPWZjAZbclueAmMOItY8gAw1nkpAdAIn8N3 bDBBo6o8oihd+EzJaoJ+lc93av7GYCZyU9BCDk88aXIINdAWWoe4dxYnHAyGUEcTdmiP DbNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0pShKvT5/yzFZP2AVSFOZ7sK5bvOSCYxtvGTUy4qix8=; b=G1Mc3rb2k/xE46XjpxMi5umOerlXePQRyUyTX2MlRCBuPUA5+42eQWp7m0kdpeaA/v ePWSVLRoWkGn14XcqPuYKeIVxSctxcb2rxPqTgH19dr7iIsC6DfokQ2Ru6w51xaBCcoF qBG6LCjZy3sXbOieqQj6hgamPRkmotIj2jc5KHuK8g6NCXoGnDi073DexYIyeZ6zlXj8 PRRv5Z7PNbG5A2hJoxftCMXDGjUe8jFcf6r1Qd2s8K6mNCodmYSCzGlx76aYYGsZJEjQ axPMxjh+mOWcrQKd5qgV1WN7qTAKGjhLCBAN8rTYlMErPSyTT4Sjm+uVCI50a+cFkQEI 55gQ== X-Gm-Message-State: APzg51DU353vTqLHa0uR3upDLzfOKOw8/VIBD5eMnrtnFWcprH/9KW9q XIdoCRv1HK6ztNzZM4pakZeafPlv X-Google-Smtp-Source: ANB0VdY/kL/LYK5s6f9P2oesNnL6idxDI2B7X80FEhHmlr14/vKWaJCT6940fVIhtjnqJPY0gcf6jw== X-Received: by 2002:a62:b20c:: with SMTP id x12-v6mr1271009pfe.201.1536745987241; Wed, 12 Sep 2018 02:53:07 -0700 (PDT) Received: from flat-canetoad.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id d132-v6sm1166307pgc.93.2018.09.12.02.53.05 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 12 Sep 2018 02:53:06 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Wed, 12 Sep 2018 19:52:47 +1000 Message-Id: <20180912095248.27557-4-oohall@gmail.com> X-Mailer: git-send-email 2.9.5 In-Reply-To: <20180912095248.27557-1-oohall@gmail.com> References: <20180912095248.27557-1-oohall@gmail.com> Subject: [Skiboot] [RFC PATCH 3/4] hw/phb4: Eliminate p->rte_cache X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" In ancient times we added a caches to struct phb3 for some of the IODA tables that are stored internal to the PHB and can only be accessed indirectly via SCOM. For some reason we also added a cache for the RTT which is an in-memory table that we can just look at directly. This was carried over to phb4 where the RTT has doubled in size to 128KB. There's no real need to have a second copy so remove the "cache" and reference the RTT directly if we need to. This makes struct phb4 smaller and simplifies the code since we don't need to update two copies of the RTT. Signed-off-by: Oliver O'Halloran --- hw/phb4.c | 34 +++++++++++++++------------------- include/phb4.h | 3 +-- 2 files changed, 16 insertions(+), 21 deletions(-) diff --git a/hw/phb4.c b/hw/phb4.c index 7666eefdcb6e..88d7bddfe990 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -276,7 +276,7 @@ static int64_t phb4_pcicfg_check(struct phb4 *p, uint32_t bdfn, return OPAL_HARDWARE; /* Fetch the PE# from cache */ - *pe = p->rte_cache[bdfn]; + *pe = p->tbl_rtt[bdfn]; return OPAL_SUCCESS; } @@ -933,8 +933,6 @@ static void phb4_init_ioda_cache(struct phb4 *p) * ever let a live FF RTT even temporarily when resetting * for EEH etc... (HW278969). */ - for (i = 0; i < ARRAY_SIZE(p->rte_cache); i++) - p->rte_cache[i] = PHB4_RESERVED_PE_NUM(p); memset(p->peltv_cache, 0x0, sizeof(p->peltv_cache)); memset(p->tve_cache, 0x0, sizeof(p->tve_cache)); @@ -1164,7 +1162,9 @@ static int64_t phb4_ioda_reset(struct phb *phb, bool purge) /* Additional OPAL specific inits */ /* Clear RTT and PELTV and PEST */ - memcpy((void *)p->tbl_rtt, p->rte_cache, RTT_TABLE_SIZE); + for (i = 0; i < RTT_TABLE_ENTRIES; i++) + p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p); + memcpy((void *)p->tbl_peltv, p->peltv_cache, p->tbl_peltv_size); /* Clear PEST & PEEV */ @@ -2158,7 +2158,6 @@ static int64_t phb4_set_pe(struct phb *phb, { struct phb4 *p = phb_to_phb4(phb); uint64_t mask, val, idx; - uint16_t *rte; /* Sanity check */ if (action != OPAL_MAP_PE && action != OPAL_UNMAP_PE) @@ -2190,16 +2189,14 @@ static int64_t phb4_set_pe(struct phb *phb, } /* Map or unmap the RTT range */ - rte = (uint16_t *)p->tbl_rtt; - for (idx = 0; idx < RTT_TABLE_ENTRIES; idx++, rte++) { + for (idx = 0; idx < RTT_TABLE_ENTRIES; idx++) { if ((idx & mask) != val) continue; if (action == OPAL_MAP_PE) - p->rte_cache[idx] = pe_number; + p->tbl_rtt[idx] = pe_number; else - p->rte_cache[idx] = PHB4_RESERVED_PE_NUM(p); - *rte = p->rte_cache[idx]; + p->tbl_rtt[idx] = PHB4_RESERVED_PE_NUM(p); } /* Invalidate the entire RTC */ @@ -3583,13 +3580,13 @@ static int64_t phb4_err_inject_cfg(struct phb4 *phb, uint64_t pe_number, ctrl = PHB_PAPR_ERR_INJ_CTL_CFG; for (bdfn = 0; bdfn < RTT_TABLE_ENTRIES; bdfn++) { - if (phb->rte_cache[bdfn] != pe_number) + if (phb->tbl_rtt[bdfn] != pe_number) continue; /* The PE can be associated with PCI bus or device */ is_bus_pe = false; if ((bdfn + 8) < RTT_TABLE_ENTRIES && - phb->rte_cache[bdfn + 8] == pe_number) + phb->tbl_rtt[bdfn + 8] == pe_number) is_bus_pe = true; /* Figure out the PCI config address */ @@ -4522,7 +4519,7 @@ static void phb4_init_ioda3(struct phb4 *p) SETFIELD(PHB_LSI_SRC_ID, 0ull, (p->num_irqs - 1) >> 3)); /* Init_20 - RTT BAR */ - out_be64(p->regs + PHB_RTT_BAR, p->tbl_rtt | PHB_RTT_BAR_ENABLE); + out_be64(p->regs + PHB_RTT_BAR, (u64) p->tbl_rtt | PHB_RTT_BAR_ENABLE); /* Init_21 - PELT-V BAR */ out_be64(p->regs + PHB_PELTV_BAR, p->tbl_peltv | PHB_PELTV_BAR_ENABLE); @@ -5019,7 +5016,6 @@ static bool phb4_read_capabilities(struct phb4 *p) static void phb4_allocate_tables(struct phb4 *p) { - uint16_t *rte; uint32_t i; /* XXX Our current memalign implementation sucks, @@ -5028,11 +5024,10 @@ static void phb4_allocate_tables(struct phb4 *p) * the memory and wastes space by always allocating twice * as much as requested (size + alignment) */ - p->tbl_rtt = (uint64_t)local_alloc(p->chip_id, RTT_TABLE_SIZE, RTT_TABLE_SIZE); + p->tbl_rtt = local_alloc(p->chip_id, RTT_TABLE_SIZE, RTT_TABLE_SIZE); assert(p->tbl_rtt); - rte = (uint16_t *)(p->tbl_rtt); - for (i = 0; i < RTT_TABLE_ENTRIES; i++, rte++) - *rte = PHB4_RESERVED_PE_NUM(p); + for (i = 0; i < RTT_TABLE_ENTRIES; i++) + p->tbl_rtt[i] = PHB4_RESERVED_PE_NUM(p); p->tbl_peltv = (uint64_t)local_alloc(p->chip_id, p->tbl_peltv_size, p->tbl_peltv_size); assert(p->tbl_peltv); @@ -5141,7 +5136,8 @@ static void phb4_add_properties(struct phb4 *p) /* Indicators for variable tables */ dt_add_property_cells(np, "ibm,opal-rtt-table", - hi32(p->tbl_rtt), lo32(p->tbl_rtt), RTT_TABLE_SIZE); + hi32((u64) p->tbl_rtt), lo32((u64) p->tbl_rtt), RTT_TABLE_SIZE); + dt_add_property_cells(np, "ibm,opal-peltv-table", hi32(p->tbl_peltv), lo32(p->tbl_peltv), p->tbl_peltv_size); dt_add_property_cells(np, "ibm,opal-pest-table", diff --git a/include/phb4.h b/include/phb4.h index d78bc3175205..b1bdcd7f7660 100644 --- a/include/phb4.h +++ b/include/phb4.h @@ -194,7 +194,7 @@ struct phb4 { uint32_t num_irqs; /* SkiBoot owned in-memory tables */ - uint64_t tbl_rtt; + uint16_t *tbl_rtt; uint64_t tbl_peltv; uint64_t tbl_peltv_size; uint64_t tbl_pest; @@ -212,7 +212,6 @@ struct phb4 { uint64_t mbt_size; uint64_t tvt_size; - uint16_t rte_cache[RTT_TABLE_ENTRIES]; /* FIXME: dynamically allocate only what's needed below */ uint64_t tve_cache[1024]; uint8_t peltv_cache[PELTV_TABLE_SIZE_MAX];