diff mbox series

[rs6000] fix PR87021 (fold-vec-splat-*.c tests)

Message ID 1536355649.5318.13.camel@brimstone.rchland.ibm.com
State New
Headers show
Series [rs6000] fix PR87021 (fold-vec-splat-*.c tests) | expand

Commit Message

will schmidt Sept. 7, 2018, 9:27 p.m. UTC 
Hi,
    
Update the fold-vec-splat-* tests to match current codegen results.
Due to codegen variations across assorted P7,p8,p9 targets, I've split
the -char test out into additional .p8 and .p9 versions with the common
parts contained in a .h included file. The assorted scan-assembly stanzas
for the rest of the tests have been simplified, corrected, commented.

This appears to now run clean across the sampling of hardware I
have handy.  (p7,p8,p9).
OK for trunk?
Thanks,
-Will

[testsuite]

2018-09-07  Will Schmidt <will_schmidt@vnet.ibm.com>
    
	* fold-vec-splat-char.h: New. Common parts for splat-char.p*.c
	* fold-vec-splat-char.c: Simplify, include splat-char.h contents.
	* fold-vec-splat-char.p8.c: New.
	* fold-vec-splat-char.p9.c: New.
	* fold-vec-splat-floatdouble.c: Updated counts, added commentary.
	* fold-vec-splat-int.c: Updated, added P9 instructions to
	scan-assembler stanza.
	* fold-vec-splat-longlong.c: Same.
	* fold-vec-splat-pixel.c: Same.
	* fold-vec-splat-short.c: Combined stanzas.
diff mbox series

Patch

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.c
index d50d073..5e3ec29 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.c
@@ -5,51 +5,14 @@ 
 /* { dg-require-effective-target powerpc_altivec_ok } */
 /* { dg-options "-maltivec -O2" } */
 
 #include <altivec.h>
 
-vector bool char testb_0  (vector bool char x) { return vec_splat (x, 0b00000); }
-vector bool char testb_1  (vector bool char x) { return vec_splat (x, 0b00001); }
-vector bool char testb_2  (vector bool char x) { return vec_splat (x, 0b00010); }
-vector bool char testb_4  (vector bool char x) { return vec_splat (x, 0b00100); }
-vector bool char testb_8  (vector bool char x) { return vec_splat (x, 0b01000); }
-vector bool char testb_10 (vector bool char x) { return vec_splat (x, 0b10000); }
-vector bool char testb_1e (vector bool char x) { return vec_splat (x, 0b11110); }
-vector bool char testb_1f (vector bool char x) { return vec_splat (x, 0b11111); }
-
-vector signed char tests_0  (vector signed char x) { return vec_splat (x, 0b00000); }
-vector signed char tests_1  (vector signed char x) { return vec_splat (x, 0b00001); }
-vector signed char tests_2  (vector signed char x) { return vec_splat (x, 0b00010); }
-vector signed char tests_4  (vector signed char x) { return vec_splat (x, 0b00100); }
-vector signed char tests_8  (vector signed char x) { return vec_splat (x, 0b01000); }
-vector signed char tests_10 (vector signed char x) { return vec_splat (x, 0b10000); }
-vector signed char tests_1e (vector signed char x) { return vec_splat (x, 0b11110); }
-vector signed char tests_1f (vector signed char x) { return vec_splat (x, 0b11111); }
-
-vector unsigned char testu_0  (vector unsigned char x) { return vec_splat (x, 0b00000); }
-vector unsigned char testu_1  (vector unsigned char x) { return vec_splat (x, 0b00001); }
-vector unsigned char testu_2  (vector unsigned char x) { return vec_splat (x, 0b00010); }
-vector unsigned char testu_4  (vector unsigned char x) { return vec_splat (x, 0b00100); }
-vector unsigned char testu_8  (vector unsigned char x) { return vec_splat (x, 0b01000); }
-vector unsigned char testu_10 (vector unsigned char x) { return vec_splat (x, 0b10000); }
-vector unsigned char testu_1e (vector unsigned char x) { return vec_splat (x, 0b11110); }
-vector unsigned char testu_1f (vector unsigned char x) { return vec_splat (x, 0b11111); }
-
-/* Similar tests as above, but the source vector is a known constant. */
-const vector bool char by = {'a','b','c','d','e','f','g','h','i','j','k','l','m','n','o','p'};
-const vector signed char sy = {'a','b','c','d','e','f','g','h','i','j','k','l','m','n','o','p'};
-const vector unsigned char uy = {'a','b','c','d','e','f','g','h','i','j','k','l','m','n','o','p'};
-
-vector bool char test_bc (vector bool char x) { return vec_splat (by, 0b00010); }
-vector signed char test_sc (vector signed char x) { return vec_splat (sy, 0b00011); }
-vector unsigned char test_uc (vector unsigned char x) { return vec_splat (uy, 0b00110); }
-
-/* Similar tests as above, mask is greater than number of elements in the
- source vector.  */
-vector bool char test_obc (vector bool char x) { return vec_splat (by, 0b10010); }
-vector signed char test_osc (vector signed char x) { return vec_splat (sy, 0b10011); }
-vector unsigned char test_ouc (vector unsigned char x) { return vec_splat (uy, 0b10110); }
-
-// vec_splat() using variable vectors should generate the vspltb instruction.
-/* { dg-final { scan-assembler-times "vspltb" 24 } } */
-// vec_splat() using a constant vector should generate a load.
-/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M} 6 } } */
+#include "fold-vec-splat-char.h"
+
+/* vec_splat() tests using a constant vector should generate a load, except on
+   newer targets where we instead get a xxspltib instruction.  Other vec_splat()
+   tests should generate the vspltb instruction.  */
+/* The exact number of instructions varies, dependant on the target machine,
+   so for this test, ensure we get at least one of each type.  */
+/* { dg-final { scan-assembler {\mvspltb\M} } } */
+/* { dg-final { scan-assembler {\mlvx\M|\mlxvw4x\M|\mxxspltib\M} } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.h b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.h
new file mode 100644
index 0000000..b9418cf
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.h
@@ -0,0 +1,47 @@ 
+/* Verify that overloaded built-ins for vec_splat with char
+   inputs produce the right code.  */
+
+/* Common testcase bits included by fold-vec-splat-char.p*.c */
+
+vector bool char testb_0  (vector bool char x) { return vec_splat (x, 0b00000); }
+vector bool char testb_1  (vector bool char x) { return vec_splat (x, 0b00001); }
+vector bool char testb_2  (vector bool char x) { return vec_splat (x, 0b00010); }
+vector bool char testb_4  (vector bool char x) { return vec_splat (x, 0b00100); }
+vector bool char testb_8  (vector bool char x) { return vec_splat (x, 0b01000); }
+vector bool char testb_10 (vector bool char x) { return vec_splat (x, 0b10000); }
+vector bool char testb_1e (vector bool char x) { return vec_splat (x, 0b11110); }
+vector bool char testb_1f (vector bool char x) { return vec_splat (x, 0b11111); }
+
+vector signed char tests_0  (vector signed char x) { return vec_splat (x, 0b00000); }
+vector signed char tests_1  (vector signed char x) { return vec_splat (x, 0b00001); }
+vector signed char tests_2  (vector signed char x) { return vec_splat (x, 0b00010); }
+vector signed char tests_4  (vector signed char x) { return vec_splat (x, 0b00100); }
+vector signed char tests_8  (vector signed char x) { return vec_splat (x, 0b01000); }
+vector signed char tests_10 (vector signed char x) { return vec_splat (x, 0b10000); }
+vector signed char tests_1e (vector signed char x) { return vec_splat (x, 0b11110); }
+vector signed char tests_1f (vector signed char x) { return vec_splat (x, 0b11111); }
+
+vector unsigned char testu_0  (vector unsigned char x) { return vec_splat (x, 0b00000); }
+vector unsigned char testu_1  (vector unsigned char x) { return vec_splat (x, 0b00001); }
+vector unsigned char testu_2  (vector unsigned char x) { return vec_splat (x, 0b00010); }
+vector unsigned char testu_4  (vector unsigned char x) { return vec_splat (x, 0b00100); }
+vector unsigned char testu_8  (vector unsigned char x) { return vec_splat (x, 0b01000); }
+vector unsigned char testu_10 (vector unsigned char x) { return vec_splat (x, 0b10000); }
+vector unsigned char testu_1e (vector unsigned char x) { return vec_splat (x, 0b11110); }
+vector unsigned char testu_1f (vector unsigned char x) { return vec_splat (x, 0b11111); }
+
+/* Similar tests as above, but the source vector is a known constant. */
+const vector bool char by = {'a','b','c','d','e','f','g','h','i','j','k','l','m','n','o','p'};
+const vector signed char sy = {'a','b','c','d','e','f','g','h','i','j','k','l','m','n','o','p'};
+const vector unsigned char uy = {'a','b','c','d','e','f','g','h','i','j','k','l','m','n','o','p'};
+
+vector bool char test_bc (vector bool char x) { return vec_splat (by, 0b00010); }
+vector signed char test_sc (vector signed char x) { return vec_splat (sy, 0b00011); }
+vector unsigned char test_uc (vector unsigned char x) { return vec_splat (uy, 0b00110); }
+
+/* Similar tests as above, mask is greater than number of elements in the
+ source vector.  */
+vector bool char test_obc (vector bool char x) { return vec_splat (by, 0b10010); }
+vector signed char test_osc (vector signed char x) { return vec_splat (sy, 0b10011); }
+vector unsigned char test_ouc (vector unsigned char x) { return vec_splat (uy, 0b10110); }
+
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.p8.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.p8.c
new file mode 100644
index 0000000..5de7ba5
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.p8.c
@@ -0,0 +1,17 @@ 
+/* Verify that overloaded built-ins for vec_splat with char
+   inputs produce the right code for a p8 target.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p8vector_ok } */
+/* { dg-options "-maltivec -O2 -mcpu=power8" } */
+/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */
+
+#include <altivec.h>
+
+#include "fold-vec-splat-char.h"
+
+/* vec_splat() tests using a constant vector should generate a load, except on
+   newer targets where we instead get a xxspltib instruction.  Other vec_splat()
+   tests should generate the vspltb instruction.  */
+/* { dg-final { scan-assembler-times {\mvspltb\M} 27 } } */
+/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M|\mxxspltib\M} 6 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.p9.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.p9.c
new file mode 100644
index 0000000..538ee39
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-char.p9.c
@@ -0,0 +1,16 @@ 
+/* Verify that overloaded built-ins for vec_splat with char
+   inputs produce the right code.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_p9vector_ok } */
+/* { dg-options "-maltivec -O2 -mpower9-vector " } */
+
+#include <altivec.h>
+
+#include "fold-vec-splat-char.h"
+
+/* vec_splat() tests using a constant vector should generate a load, except on
+   newer targets where we instead get a xxspltib instruction.  Other vec_splat()
+   tests should generate the vspltb instruction.  */
+/* { dg-final { scan-assembler-times {\mvspltb\M} 24 } } */
+/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvw4x\M|\mxxspltib\M} 6 { target p9vector_hw } } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-floatdouble.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-floatdouble.c
index fd74002..b1703ec 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-floatdouble.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-floatdouble.c
@@ -34,13 +34,14 @@  vector double test_dc () { const vector double y = { 3.0, 5.0 }; return vec_spla
 /* Similar tests as above, mask is greater than number of elements in the
  source vector.  */
 vector float test_ofc () { const vector float y = { 7.1, 8.2, 9.3, 10.4}; return vec_splat (y, 0b10010); }
 vector double test_odc () { const vector double y = { 3.0, 5.0 }; return vec_splat (y, 0b10010); }
 
-/* lvx or lxvd2x for loading of the constants.  */
-/* vspltw or xxspltw for non-constants with the float type.  */
-/* xxpermdi for non-constants with the double type.  */
-
-/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvd2x\M} 4 } } */
-/* { dg-final { scan-assembler-times "vspltw|xxspltw" 9 } } */
-/* { dg-final { scan-assembler-times "xxpermdi" 9 } } */
+/* splat of floats tend to generate xxspltw or vspltw instructions. 
+   splat of doubles tend to generate xxpermdi instructions.
+   splat of known constant values tend to be a straightforward load
+   instruction, or a load + xxpermdi. */
+
+/* { dg-final { scan-assembler-times "vspltw|xxspltw" 10 } } */
+/* { dg-final { scan-assembler-times "xxpermdi" 11 } } */
+/* { dg-final { scan-assembler-times {\mlvx\M|\mlxv\M|\mlxvw4x\M|\mlxvd2x\M} 4 } } */
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-int.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-int.c
index 7697853..a55276a 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-int.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-int.c
@@ -43,8 +43,7 @@  vector unsigned int test_uic () { const vector unsigned int y = { 1,2,3,4}; retu
  source vector.  */
 vector bool int test_obic () { const vector bool int y = { 1,2,3,4}; return vec_splat (y, 0b10010); }
 vector signed int test_osic () { const vector signed int y = { 1,2,3,4}; return vec_splat (y, 0b10010); }
 vector unsigned int test_ouic () { const vector unsigned int y = { 1,2,3,4}; return vec_splat (y, 0b10010); }
 
-/* { dg-final { scan-assembler-times "vspltisw" 6 } } */
-/* { dg-final { scan-assembler-times "vspltw|xxspltw" 24 } } */
+/* { dg-final { scan-assembler-times "vspltisw|vspltw|xxspltw|xxspltib" 30 } } */
 
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-longlong.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-longlong.c
index 0720e20..adb140f 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-longlong.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-longlong.c
@@ -44,11 +44,11 @@  vector unsigned long long test_ull () { const vector unsigned long long y = {56,
 vector bool long long test_obll () { const vector bool long long y = {12, 23}; return vec_splat (y, 0b10010); }
 vector signed long long test_osll () { const vector signed long long y = {34, 45}; return vec_splat (y, 0b10010); }
 vector unsigned long long test_oull () { const vector unsigned long long y = {56, 67}; return vec_splat (y, 0b10010); }
 
 /* lvx for the initialization with known constants. */
-/* { dg-final { scan-assembler-times {\mlvx\M|\mlxvd2x\M} 6 } } */
+/* { dg-final { scan-assembler-times {\mlvx\M|\mlxv\M|\mlxvd2x\M} 6 } } */
 
 /* xxpermdi for vec_splat of long long vectors.
    At the time of this writing, the number of xxpermdi instructions
    generated could be 24 or 26 or 27, ultimately depending on the
    platform and whether or not folding is enabled.
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-pixel.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-pixel.c
index 7170588..6ecafaa 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-pixel.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-pixel.c
@@ -21,7 +21,6 @@  vector pixel test_p () { const vector pixel y = { 1,2,3,4}; return vec_splat (y,
 
 /* Similar tests as above, mask is greater than number of elements in the
  source vector.  */
 vector pixel test_op () { const vector pixel y = { 1,2,3,4}; return vec_splat (y, 0b10010); }
 
-/* { dg-final { scan-assembler-times "vspltish" 2 } } */
-/* { dg-final { scan-assembler-times "vsplth" 8 } } */
+/* { dg-final { scan-assembler-times {\mvspltis[hw]\M|\mxxspltib\M|\mvsplth\M} 10 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-short.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-short.c
index 96c553f..f03e71c 100644
--- a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-short.c
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-short.c
@@ -43,7 +43,6 @@  vector unsigned short test_us () { const vector unsigned short y = {1, 2, 3, 4,
  source vector.  */
 vector bool short test_obs () { const vector bool short y = {1, 2, 3, 4, 5, 6, 7, 8}; return vec_splat (y, 0b10010); }
 vector signed short test_oss () { const vector signed short y = {1, 2, 3, 4, 5, 6, 7, 8}; return vec_splat (y, 0b10010); }
 vector unsigned short test_ous () { const vector unsigned short y = {1, 2, 3, 4, 5, 6, 7, 8}; return vec_splat (y, 0b10010); }
 
-/* { dg-final { scan-assembler-times "vspltish" 6 } } */
-/* { dg-final { scan-assembler-times "vsplth" 24 } } */
+/* { dg-final { scan-assembler-times "vspltish|vsplth|xxspltib" 30 } } */