From patchwork Sat May 21 10:31:11 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 96690 Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from ozlabs.org (localhost [IPv6:::1]) by ozlabs.org (Postfix) with ESMTP id A7011B73DD for ; Sat, 21 May 2011 20:31:25 +1000 (EST) Received: from mail-fx0-f51.google.com (mail-fx0-f51.google.com [209.85.161.51]) (using TLSv1 with cipher RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (verified OK)) by ozlabs.org (Postfix) with ESMTPS id E5C4FB72AA for ; Sat, 21 May 2011 20:31:11 +1000 (EST) Received: by fxm5 with SMTP id 5so3514534fxm.38 for ; Sat, 21 May 2011 03:31:05 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:from:to:cc:subject:date:message-id:x-mailer :in-reply-to:references; bh=XyI0eq/eEwW6Xaequ2CPpvL73yoj45C1GoragA5pRsU=; b=IP/Y63IJqwF3qvObdVLuSJMBp8PuMDQq3zBC1h0QXveSQ/SzFPXvDj2CcO8r7n0cBe BJd1T7VCnIIJNR/BmjYyTlSdq/SCyyjFHjqSOpS0vuTFcCr/pEWdenlv/87+kfLEjITH INU6g85HlUk6Jq+9chnorDVRBmoKPi1CyyvlU= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references; b=WboEdICbOge8E6AJRZ4Xl7nG3b/xgCFZaH+Id+tI2CXOY+WnBzQk7hEzUP1aIJDIzh sxZ9oZv61pAcZg8GvpkE8xdUpyw7W0C2hI3sVH25hfBJMVG6T0sBc5hfcLebBHIo3EID 7sVPlBJSwZ24TrrCh7ibOfPfO7RcaPn9POfVM= Received: by 10.223.85.155 with SMTP id o27mr497056fal.109.1305973865796; Sat, 21 May 2011 03:31:05 -0700 (PDT) Received: from doriath.ww600.siemens.net (92-100-166-160.dynamic.avangarddsl.ru [92.100.166.160]) by mx.google.com with ESMTPS id 22sm1690253fay.21.2011.05.21.03.31.03 (version=SSLv3 cipher=OTHER); Sat, 21 May 2011 03:31:05 -0700 (PDT) From: Dmitry Eremin-Solenikov To: linuxppc-dev@lists.ozlabs.org Subject: [PATCH 2/2] cpc925_edac: support single-processor configurations Date: Sat, 21 May 2011 14:31:11 +0400 Message-Id: <1305973871-28244-2-git-send-email-dbaryshkov@gmail.com> X-Mailer: git-send-email 1.7.4.4 In-Reply-To: <1305973871-28244-1-git-send-email-dbaryshkov@gmail.com> References: <1305973871-28244-1-git-send-email-dbaryshkov@gmail.com> Cc: Harry Ciao , Paul Mackerras , Doug Thompson X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org Sender: linuxppc-dev-bounces+patchwork-incoming=ozlabs.org@lists.ozlabs.org If second CPU is not enabled, CPC925 EDAC driver will spill out warnings about errors on second Processor Interface. Support masking that out, by detecting at runtime which CPUs are present in device tree. Signed-off-by: Dmitry Eremin-Solenikov Cc: Harry Ciao Cc: Doug Thompson --- drivers/edac/cpc925_edac.c | 45 ++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 45 insertions(+), 0 deletions(-) diff --git a/drivers/edac/cpc925_edac.c b/drivers/edac/cpc925_edac.c index 837ad8f..fbb6947 100644 --- a/drivers/edac/cpc925_edac.c +++ b/drivers/edac/cpc925_edac.c @@ -90,6 +90,7 @@ enum apimask_bits { ECC_MASK_ENABLE = (APIMASK_ECC_UE_H | APIMASK_ECC_CE_H | APIMASK_ECC_UE_L | APIMASK_ECC_CE_L), }; +#define APIMASK_ADI(n) CPC925_BIT(((n)+1)) /************************************************************ * Processor Interface Exception Register (APIEXCP) @@ -581,16 +582,57 @@ static void cpc925_mc_check(struct mem_ctl_info *mci) } /******************** CPU err device********************************/ +static u32 cpc925_cpu_getmask(void) +{ + struct device_node *cpus; + struct device_node *cpunode; + static u32 mask = 0; + + if (mask != 0) + return mask; + + mask = APIMASK_ADI0 | APIMASK_ADI1; + + cpus = of_find_node_by_path("/cpus"); + if (cpus == NULL) { + cpc925_printk(KERN_DEBUG, "No /cpus node !\n"); + return 0; + } + + /* Get first CPU node */ + for (cpunode = NULL; + (cpunode = of_get_next_child(cpus, cpunode)) != NULL;) { + const u32 *reg = of_get_property(cpunode, "reg", NULL); + + cpc925_printk(KERN_ERR, "HERE: %s %p %d %d %d %lx\n", cpunode->type, reg, reg ? *reg : -1, !strcmp(cpunode->type, "cpu"), reg != NULL, APIMASK_ADI(*reg)); + if (!strcmp(cpunode->type, "cpu") && reg != NULL) + mask &= ~APIMASK_ADI(*reg); + } + + of_node_put(cpunode); + of_node_put(cpus); + + return mask; +} + /* Enable CPU Errors detection */ static void cpc925_cpu_init(struct cpc925_dev_info *dev_info) { u32 apimask; + u32 cpumask; apimask = __raw_readl(dev_info->vbase + REG_APIMASK_OFFSET); if ((apimask & CPU_MASK_ENABLE) == 0) { apimask |= CPU_MASK_ENABLE; __raw_writel(apimask, dev_info->vbase + REG_APIMASK_OFFSET); } + + cpumask = cpc925_cpu_getmask(); + if (apimask & cpumask) { + cpc925_printk(KERN_WARNING, "CPU(s) not present, " + "but enabled in APIMASK, disabling\n"); + apimask &= ~cpumask; + } } /* Disable CPU Errors detection */ @@ -622,6 +664,9 @@ static void cpc925_cpu_check(struct edac_device_ctl_info *edac_dev) if ((apiexcp & CPU_EXCP_DETECTED) == 0) return; + if ((apiexcp & ~cpc925_cpu_getmask()) == 0) + return; + apimask = __raw_readl(dev_info->vbase + REG_APIMASK_OFFSET); cpc925_printk(KERN_INFO, "Processor Interface Fault\n" "Processor Interface register dump:\n");