Patchwork [U-Boot,v4,3/4] MX5: Introduce a function for setting the chip select size

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Submitter Fabio Estevam
Date May 19, 2011, 7:27 p.m.
Message ID <1305833248-30716-3-git-send-email-fabio.estevam@freescale.com>
Download mbox | patch
Permalink /patch/96447/
State Accepted
Headers show

Comments

Fabio Estevam - May 19, 2011, 7:27 p.m.
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v3:
- Print the chip size in the case of error

 arch/arm/cpu/armv7/mx5/soc.c              |   30 +++++++++++++++++++++++++++++
 arch/arm/include/asm/arch-mx5/imx-regs.h  |    5 ++++
 arch/arm/include/asm/arch-mx5/sys_proto.h |    2 +-
 3 files changed, 36 insertions(+), 1 deletions(-)

Patch

diff --git a/arch/arm/cpu/armv7/mx5/soc.c b/arch/arm/cpu/armv7/mx5/soc.c
index 40b8b56..e599df8 100644
--- a/arch/arm/cpu/armv7/mx5/soc.c
+++ b/arch/arm/cpu/armv7/mx5/soc.c
@@ -163,6 +163,36 @@  int cpu_mmc_init(bd_t *bis)
 #endif
 }
 
+void set_chipselect_size(int const cs_size)
+{
+	unsigned int reg;
+	struct iomuxc *iomuxc_regs = (struct weim *)IOMUXC_BASE_ADDR;
+	reg = readl(&iomuxc_regs->gpr1);
+
+	switch (cs_size) {
+	case CS0_128:
+		reg &= ~0x7;	/* CS0=128MB, CS1=0, CS2=0, CS3=0 */
+		reg |= 0x5;
+		break;
+	case CS0_64M_CS1_64M:
+		reg &= ~0x3F;	/* CS0=64MB, CS1=64MB, CS2=0, CS3=0 */
+		reg |= 0x1B;
+		break;
+	case CS0_64M_CS1_32M_CS2_32M:
+		reg &= ~0x1FF;	/* CS0=64MB, CS1=32MB, CS2=32MB, CS3=0 */
+		reg |= 0x4B;
+		break;
+	case CS0_32M_CS1_32M_CS2_32M_CS3_32M:
+		reg &= ~0xFFF;  /* CS0=32MB, CS1=32MB, CS2=32MB, CS3=32MB */
+		reg |= 0x249;
+		break;
+	default:
+		printf("Unknown chip select size: %d\n", cs_size);
+		break;
+	}
+
+	writel(reg, &iomuxc_regs->gpr1);
+}
 
 void reset_cpu(ulong addr)
 {
diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index 9d2046a..5163614 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -214,6 +214,11 @@ 
 #define WDOG_EN(x)	((x) << 8)
 #define WDOG_LIMIT(x)	(((x) & 0x3) << 9)
 
+#define CS0_128					0
+#define CS0_64M_CS1_64M				1
+#define CS0_64M_CS1_32M_CS2_32M			2
+#define CS0_32M_CS1_32M_CS2_32M_CS3_32M		3
+
 /*
  * Number of GPIO pins per port
  */
diff --git a/arch/arm/include/asm/arch-mx5/sys_proto.h b/arch/arm/include/asm/arch-mx5/sys_proto.h
index f687503..ce63675 100644
--- a/arch/arm/include/asm/arch-mx5/sys_proto.h
+++ b/arch/arm/include/asm/arch-mx5/sys_proto.h
@@ -27,5 +27,5 @@ 
 u32 get_cpu_rev(void);
 #define is_soc_rev(rev)	((get_cpu_rev() & 0xFF) - rev)
 void sdelay(unsigned long);
-
+void set_chipselect_size(int const);
 #endif