[v3,04/38] dt-bindings: mmc: Add Tegra SDHCI sampling trimmer values
diff mbox series

Message ID 20180830150639.21048-5-avienamo@nvidia.com
State Accepted
Headers show
Series
  • Tegra SDHCI add support for HS200 and UHS signaling
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Commit Message

Aapo Vienamo Aug. 30, 2018, 3:06 p.m. UTC
Document the Tegra SDHCI inbound and outbound sampling trimmer values.

Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
Acked-by: Thierry Reding <treding@nvidia.com>
---
 .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt  | 11 +++++++++++
 1 file changed, 11 insertions(+)

Comments

Ulf Hansson Aug. 31, 2018, 1:15 p.m. UTC | #1
On 30 August 2018 at 17:06, Aapo Vienamo <avienamo@nvidia.com> wrote:
> Document the Tegra SDHCI inbound and outbound sampling trimmer values.
>
> Signed-off-by: Aapo Vienamo <avienamo@nvidia.com>
> Acked-by: Thierry Reding <treding@nvidia.com>

Applied for next, thanks!

I noted that Rob added his tag for the earlier version, so I am
re-adding when applying.

Kind regards
Uffe

> ---
>  .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt  | 11 +++++++++++
>  1 file changed, 11 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
> index 9713e052f736..edecf97231b9 100644
> --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
> +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
> @@ -67,6 +67,10 @@ Optional properties for Tegra210 and Tegra186:
>  - nvidia,pad-autocal-pull-up-offset-hs400,
>    nvidia,pad-autocal-pull-down-offset-hs400 : Specify drive strength
>    calibration offsets for HS400 mode.
> +- nvidia,default-tap : Specify the default inbound sampling clock
> +  trimmer value for non-tunable modes.
> +- nvidia,default-trim : Specify the default outbound clock trimmer
> +  value.
>
>    Notes on the pad calibration pull up and pulldown offset values:
>      - The property values are drive codes which are programmed into the
> @@ -77,6 +81,13 @@ Optional properties for Tegra210 and Tegra186:
>      - The SDR104 and HS400 timing specific values are used in
>        corresponding modes if specified.
>
> +  Notes on tap and trim values:
> +    - The values are used for compensating trace length differences
> +      by adjusting the sampling point.
> +    - The values are programmed to the Vendor Clock Control Register.
> +      Please refer to the reference manual of the SoC for correct
> +      values.
> +
>  Example:
>  sdhci@700b0000 {
>         compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";
> --
> 2.18.0
>

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
index 9713e052f736..edecf97231b9 100644
--- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
+++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.txt
@@ -67,6 +67,10 @@  Optional properties for Tegra210 and Tegra186:
 - nvidia,pad-autocal-pull-up-offset-hs400,
   nvidia,pad-autocal-pull-down-offset-hs400 : Specify drive strength
   calibration offsets for HS400 mode.
+- nvidia,default-tap : Specify the default inbound sampling clock
+  trimmer value for non-tunable modes.
+- nvidia,default-trim : Specify the default outbound clock trimmer
+  value.
 
   Notes on the pad calibration pull up and pulldown offset values:
     - The property values are drive codes which are programmed into the
@@ -77,6 +81,13 @@  Optional properties for Tegra210 and Tegra186:
     - The SDR104 and HS400 timing specific values are used in
       corresponding modes if specified.
 
+  Notes on tap and trim values:
+    - The values are used for compensating trace length differences
+      by adjusting the sampling point.
+    - The values are programmed to the Vendor Clock Control Register.
+      Please refer to the reference manual of the SoC for correct
+      values.
+
 Example:
 sdhci@700b0000 {
 	compatible = "nvidia,tegra210-sdhci", "nvidia,tegra124-sdhci";