diff mbox

[7/7] powerpc/e5500: set MMU_FTR_USE_PAIRED_MAS

Message ID 20110518210538.GF29524@schlenkerla.am.freescale.net (mailing list archive)
State Superseded
Headers show

Commit Message

Scott Wood May 18, 2011, 9:05 p.m. UTC
Signed-off-by: Scott Wood <scottwood@freescale.com>
---
Is there any 64-bit book3e chip that doesn't support this?  It
doesn't appear to be optional in the ISA.

 arch/powerpc/kernel/cputable.c |    2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

Comments

Benjamin Herrenschmidt May 18, 2011, 9:38 p.m. UTC | #1
On Wed, 2011-05-18 at 16:05 -0500, Scott Wood wrote:
> Signed-off-by: Scott Wood <scottwood@freescale.com>
> ---
> Is there any 64-bit book3e chip that doesn't support this?  It
> doesn't appear to be optional in the ISA.

Not afaik.

Cheers,
Ben.

>  arch/powerpc/kernel/cputable.c |    2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
> index 34d2722..a3b8eeb 100644
> --- a/arch/powerpc/kernel/cputable.c
> +++ b/arch/powerpc/kernel/cputable.c
> @@ -1981,7 +1981,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
>  		.cpu_features		= CPU_FTRS_E5500,
>  		.cpu_user_features	= COMMON_USER_BOOKE,
>  		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
> -			MMU_FTR_USE_TLBILX,
> +			MMU_FTR_USE_TLBILX | MMU_FTR_USE_PAIRED_MAS,
>  		.icache_bsize		= 64,
>  		.dcache_bsize		= 64,
>  		.num_pmcs		= 4,
Scott Wood May 18, 2011, 9:52 p.m. UTC | #2
On Thu, 19 May 2011 07:38:19 +1000
Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:

> On Wed, 2011-05-18 at 16:05 -0500, Scott Wood wrote:
> > Signed-off-by: Scott Wood <scottwood@freescale.com>
> > ---
> > Is there any 64-bit book3e chip that doesn't support this?  It
> > doesn't appear to be optional in the ISA.
> 
> Not afaik.

Any objection to just removing the feature bit?

-Scott
Benjamin Herrenschmidt May 18, 2011, 9:58 p.m. UTC | #3
On Wed, 2011-05-18 at 16:52 -0500, Scott Wood wrote:
> On Thu, 19 May 2011 07:38:19 +1000
> Benjamin Herrenschmidt <benh@kernel.crashing.org> wrote:
> 
> > On Wed, 2011-05-18 at 16:05 -0500, Scott Wood wrote:
> > > Signed-off-by: Scott Wood <scottwood@freescale.com>
> > > ---
> > > Is there any 64-bit book3e chip that doesn't support this?  It
> > > doesn't appear to be optional in the ISA.
> > 
> > Not afaik.
> 
> Any objection to just removing the feature bit?

Nope. Wasn't it added by Kumar in the first place ?

Cheers,
Ben.
diff mbox

Patch

diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 34d2722..a3b8eeb 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -1981,7 +1981,7 @@  static struct cpu_spec __initdata cpu_specs[] = {
 		.cpu_features		= CPU_FTRS_E5500,
 		.cpu_user_features	= COMMON_USER_BOOKE,
 		.mmu_features		= MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
-			MMU_FTR_USE_TLBILX,
+			MMU_FTR_USE_TLBILX | MMU_FTR_USE_PAIRED_MAS,
 		.icache_bsize		= 64,
 		.dcache_bsize		= 64,
 		.num_pmcs		= 4,