| Message ID | 1534821487-14189-3-git-send-email-jing2.liu@linux.intel.com |
|---|---|
| State | New |
| Headers | show |
| Series | hw/pci: PCI resource reserve capability | expand |
On 08/21/2018 06:18 AM, Jing Liu wrote: > Add hint to firmware (e.g. SeaBIOS) to reserve addtional > BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the > resource reserve capability deleting in pci_bridge_dev_exitfn. > > Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> > --- > hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ > 1 file changed, 24 insertions(+) > > diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c > index b2d861d..97a8e8b 100644 > --- a/hw/pci-bridge/pci_bridge_dev.c > +++ b/hw/pci-bridge/pci_bridge_dev.c > @@ -46,6 +46,9 @@ struct PCIBridgeDev { > uint32_t flags; > > OnOffAuto msi; > + > + /* additional resources to reserve */ > + PCIResReserve res_reserve; > }; > typedef struct PCIBridgeDev PCIBridgeDev; > > @@ -95,6 +98,12 @@ static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp) > error_free(local_err); > } > > + err = pci_bridge_qemu_reserve_cap_init(dev, 0, > + bridge_dev->res_reserve, errp); > + if (err) { > + goto cap_error; > + } > + > if (shpc_present(dev)) { > /* TODO: spec recommends using 64 bit prefetcheable BAR. > * Check whether that works well. */ > @@ -103,6 +112,8 @@ static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp) > } > return; > > +cap_error: > + msi_uninit(dev); > msi_error: > slotid_cap_cleanup(dev); > slotid_error: > @@ -116,6 +127,8 @@ shpc_error: > static void pci_bridge_dev_exitfn(PCIDevice *dev) > { > PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); > + > + pci_del_capability(dev, PCI_CAP_ID_VNDR, sizeof(PCIBridgeQemuCap)); > if (msi_present(dev)) { > msi_uninit(dev); > } > @@ -162,6 +175,17 @@ static Property pci_bridge_dev_properties[] = { > ON_OFF_AUTO_AUTO), > DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, > PCI_BRIDGE_DEV_F_SHPC_REQ, true), > + DEFINE_PROP_UINT32("bus-reserve", PCIBridgeDev, > + res_reserve.bus, -1), > + DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev, > + res_reserve.io, -1), > + DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev, > + res_reserve.mem_non_pref, -1), > + DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev, > + res_reserve.mem_pref_32, -1), > + DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev, > + res_reserve.mem_pref_64, -1), > + > DEFINE_PROP_END_OF_LIST(), > }; > Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> Thanks, Marcel
Hi Marcel, On 8/21/2018 5:59 PM, Marcel Apfelbaum wrote: > > > On 08/21/2018 06:18 AM, Jing Liu wrote: >> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >> resource reserve capability deleting in pci_bridge_dev_exitfn. >> >> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >> --- >> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >> 1 file changed, 24 insertions(+) >> [...] > > Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> > Thanks for the quick reviewing and feedback. So could I ask what I should do now, update a new version with your rb or just waiting for pushing, or else? Thanks, Jing > Thanks, > Marcel >
Hi Jing, On 08/22/2018 04:53 AM, Liu, Jing2 wrote: > Hi Marcel, > > On 8/21/2018 5:59 PM, Marcel Apfelbaum wrote: >> >> >> On 08/21/2018 06:18 AM, Jing Liu wrote: >>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>> >>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>> --- >>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>> 1 file changed, 24 insertions(+) >>> > [...] >> >> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >> > Thanks for the quick reviewing and feedback. > So could I ask what I should do now, update a new version > with your rb or just waiting for pushing, or else? > You just need to wait until Michael adds the series to his next pull request. Nothing more to do. Thanks, Marcel > Thanks, > Jing > >> Thanks, >> Marcel >>
Hi Marcel, On 8/22/2018 2:58 PM, Marcel Apfelbaum wrote: > Hi Jing, > > On 08/22/2018 04:53 AM, Liu, Jing2 wrote: >> Hi Marcel, >> >> On 8/21/2018 5:59 PM, Marcel Apfelbaum wrote: >>> >>> >>> On 08/21/2018 06:18 AM, Jing Liu wrote: >>>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>>> >>>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>>> --- >>>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>>> 1 file changed, 24 insertions(+) >>>> >> [...] >>> >>> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >>> >> Thanks for the quick reviewing and feedback. >> So could I ask what I should do now, update a new version >> with your rb or just waiting for pushing, or else? >> > > You just need to wait until Michael adds the series > to his next pull request. Nothing more to do. > OK, got it! Thanks! BTW, do you have some suggestion on the seabios counterpart patches? https://patchew.org/Seabios/1534386737-8131-1-git-send-email-jing2.liu@linux.intel.com/ Jing > Thanks, > Marcel > >> Thanks, >> Jing >> >>> Thanks, >>> Marcel >>> > >
Hi Jing, On 08/24/2018 05:27 AM, Liu, Jing2 wrote: > Hi Marcel, > > On 8/22/2018 2:58 PM, Marcel Apfelbaum wrote: >> Hi Jing, >> >> On 08/22/2018 04:53 AM, Liu, Jing2 wrote: >>> Hi Marcel, >>> >>> On 8/21/2018 5:59 PM, Marcel Apfelbaum wrote: >>>> >>>> >>>> On 08/21/2018 06:18 AM, Jing Liu wrote: >>>>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>>>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>>>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>>>> >>>>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>>>> --- >>>>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>>>> 1 file changed, 24 insertions(+) >>>>> >>> [...] >>>> >>>> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >>>> >>> Thanks for the quick reviewing and feedback. >>> So could I ask what I should do now, update a new version >>> with your rb or just waiting for pushing, or else? >>> >> >> You just need to wait until Michael adds the series >> to his next pull request. Nothing more to do. >> > OK, got it! Thanks! Please ping Michael if your code is not merged in a week or so. > BTW, do you have some suggestion on the seabios counterpart patches? > https://patchew.org/Seabios/1534386737-8131-1-git-send-email-jing2.liu@linux.intel.com/ > I plan to have a look this weekend. Thanks, Marcel > Jing >> Thanks, >> Marcel >> >>> Thanks, >>> Jing >>> >>>> Thanks, >>>> Marcel >>>> >> >>
Hi Marcel, On 8/25/2018 12:51 AM, Marcel Apfelbaum wrote: >>>>> On 08/21/2018 06:18 AM, Jing Liu wrote: >>>>>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>>>>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>>>>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>>>>> >>>>>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>>>>> --- >>>>>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>>>>> 1 file changed, 24 insertions(+) >>>>>> >>>> [...] >>>>> >>>>> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >>>>> >>>> Thanks for the quick reviewing and feedback. >>>> So could I ask what I should do now, update a new version >>>> with your rb or just waiting for pushing, or else? >>>> >>> >>> You just need to wait until Michael adds the series >>> to his next pull request. Nothing more to do. >>> >> OK, got it! Thanks! > > Please ping Michael if your code is not merged in a week or so. > Got it, I will check by "git pull" to see if master branch has that. >> BTW, do you have some suggestion on the seabios counterpart patches? >> https://patchew.org/Seabios/1534386737-8131-1-git-send-email-jing2.liu@linux.intel.com/ >> > > I plan to have a look this weekend. > Glad to see your comments! Thanks very much, Jing > Thanks, > Marcel > >> Jing >>> Thanks, >>> Marcel >>> >>>> Thanks, >>>> Jing >>>> >>>>> Thanks, >>>>> Marcel >>>>> >>> >>> > >
Ping Michael :) Thanks, Jing On 8/25/2018 12:51 AM, Marcel Apfelbaum wrote: >>>>> On 08/21/2018 06:18 AM, Jing Liu wrote: >>>>>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>>>>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>>>>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>>>>> >>>>>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>>>>> --- >>>>>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>>>>> 1 file changed, 24 insertions(+) [...] >>>>> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >>>>> >>>> Thanks for the quick reviewing and feedback. >>>> So could I ask what I should do now, update a new version >>>> with your rb or just waiting for pushing, or else? >>>> >>> >>> You just need to wait until Michael adds the series >>> to his next pull request. Nothing more to do. >>> >> OK, got it! Thanks! > > Please ping Michael if your code is not merged in a week or so. > >> BTW, do you have some suggestion on the seabios counterpart patches? >> https://patchew.org/Seabios/1534386737-8131-1-git-send-email-jing2.liu@linux.intel.com/ >> > > I plan to have a look this weekend. > > Thanks, > Marcel
Hi Marcel and Michael, Got no response so I would like to ask if I need do something more for this serial? :) Thanks, Jing On 8/30/2018 10:58 AM, Liu, Jing2 wrote: > Ping Michael :) > > Thanks, > Jing > > On 8/25/2018 12:51 AM, Marcel Apfelbaum wrote: >>>>>> On 08/21/2018 06:18 AM, Jing Liu wrote: >>>>>>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>>>>>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>>>>>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>>>>>> >>>>>>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>>>>>> --- >>>>>>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>>>>>> 1 file changed, 24 insertions(+) > [...] >>>>>> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >>>>>> >>>>> Thanks for the quick reviewing and feedback. >>>>> So could I ask what I should do now, update a new version >>>>> with your rb or just waiting for pushing, or else? >>>>> >>>> >>>> You just need to wait until Michael adds the series >>>> to his next pull request. Nothing more to do. >>>> >>> OK, got it! Thanks! >> >> Please ping Michael if your code is not merged in a week or so. >> >>> BTW, do you have some suggestion on the seabios counterpart patches? >>> https://patchew.org/Seabios/1534386737-8131-1-git-send-email-jing2.liu@linux.intel.com/ >>> >> >> I plan to have a look this weekend. >> >> Thanks, >> Marcel >
On 09/05/2018 05:08 AM, Liu, Jing2 wrote: > Hi Marcel and Michael, > > Got no response so I would like to ask if I need do something more for > this serial? :) > Hi Jing, Maybe Michael is PTO, let's wait a few more days. Michael, I can send a pull request for this series if you are busy. Thanks, Marcel > Thanks, > Jing > > On 8/30/2018 10:58 AM, Liu, Jing2 wrote: >> Ping Michael :) >> >> Thanks, >> Jing >> >> On 8/25/2018 12:51 AM, Marcel Apfelbaum wrote: >>>>>>> On 08/21/2018 06:18 AM, Jing Liu wrote: >>>>>>>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>>>>>>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>>>>>>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>>>>>>> >>>>>>>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>>>>>>> --- >>>>>>>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>>>>>>> 1 file changed, 24 insertions(+) >> [...] >>>>>>> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >>>>>>> >>>>>> Thanks for the quick reviewing and feedback. >>>>>> So could I ask what I should do now, update a new version >>>>>> with your rb or just waiting for pushing, or else? >>>>>> >>>>> >>>>> You just need to wait until Michael adds the series >>>>> to his next pull request. Nothing more to do. >>>>> >>>> OK, got it! Thanks! >>> >>> Please ping Michael if your code is not merged in a week or so. >>> >>>> BTW, do you have some suggestion on the seabios counterpart patches? >>>> https://patchew.org/Seabios/1534386737-8131-1-git-send-email-jing2.liu@linux.intel.com/ >>>> >>> >>> I plan to have a look this weekend. >>> >>> Thanks, >>> Marcel >>
Hi Marcle, On 9/6/2018 12:36 AM, Marcel Apfelbaum wrote: > > > On 09/05/2018 05:08 AM, Liu, Jing2 wrote: >> Hi Marcel and Michael, >> >> Got no response so I would like to ask if I need do something more for >> this serial? :) >> > > Hi Jing, > > Maybe Michael is PTO, let's wait a few more days. > Thank you, I got it :) BRs, Jing > Michael, I can send a pull request for this series if you are busy. > Thanks, > Marcel > >> Thanks, >> Jing >> >> On 8/30/2018 10:58 AM, Liu, Jing2 wrote: >>> Ping Michael :) >>> >>> Thanks, >>> Jing >>> >>> On 8/25/2018 12:51 AM, Marcel Apfelbaum wrote: >>>>>>>> On 08/21/2018 06:18 AM, Jing Liu wrote: >>>>>>>>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>>>>>>>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>>>>>>>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>>>>>>>> >>>>>>>>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>>>>>>>> --- >>>>>>>>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>>>>>>>> 1 file changed, 24 insertions(+) >>> [...] >>>>>>>> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >>>>>>>> >>>>>>> Thanks for the quick reviewing and feedback. >>>>>>> So could I ask what I should do now, update a new version >>>>>>> with your rb or just waiting for pushing, or else? >>>>>>> >>>>>> >>>>>> You just need to wait until Michael adds the series >>>>>> to his next pull request. Nothing more to do. >>>>>> >>>>> OK, got it! Thanks! >>>> >>>> Please ping Michael if your code is not merged in a week or so. >>>> >>>>> BTW, do you have some suggestion on the seabios counterpart patches? >>>>> https://patchew.org/Seabios/1534386737-8131-1-git-send-email-jing2.liu@linux.intel.com/ >>>>> >>>> >>>> I plan to have a look this weekend. >>>> >>>> Thanks, >>>> Marcel >>> > >
Hi Marcle and Michael, Re-ping if this is not in the PR list :) Thanks, Jing On 9/6/2018 10:16 AM, Liu, Jing2 wrote: > Hi Marcle, > > On 9/6/2018 12:36 AM, Marcel Apfelbaum wrote: >> >> >> On 09/05/2018 05:08 AM, Liu, Jing2 wrote: >>> Hi Marcel and Michael, >>> >>> Got no response so I would like to ask if I need do something more for >>> this serial? :) >>> >> >> Hi Jing, >> >> Maybe Michael is PTO, let's wait a few more days. >> > Thank you, I got it :) > > BRs, > Jing >> Michael, I can send a pull request for this series if you are busy. >> Thanks, >> Marcel >> >>> Thanks, >>> Jing >>> >>> On 8/30/2018 10:58 AM, Liu, Jing2 wrote: >>>> Ping Michael :) >>>> >>>> Thanks, >>>> Jing >>>> >>>> On 8/25/2018 12:51 AM, Marcel Apfelbaum wrote: >>>>>>>>> On 08/21/2018 06:18 AM, Jing Liu wrote: >>>>>>>>>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>>>>>>>>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>>>>>>>>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>>>>>>>>> >>>>>>>>>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>>>>>>>>> --- >>>>>>>>>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>>>>>>>>> 1 file changed, 24 insertions(+) >>>> [...] >>>>>>>>> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >>>>>>>>> >>>>>>>> Thanks for the quick reviewing and feedback. >>>>>>>> So could I ask what I should do now, update a new version >>>>>>>> with your rb or just waiting for pushing, or else? >>>>>>>> >>>>>>> >>>>>>> You just need to wait until Michael adds the series >>>>>>> to his next pull request. Nothing more to do. >>>>>>> >>>>>> OK, got it! Thanks! >>>>> >>>>> Please ping Michael if your code is not merged in a week or so. >>>>> >>>>>> BTW, do you have some suggestion on the seabios counterpart patches? >>>>>> https://patchew.org/Seabios/1534386737-8131-1-git-send-email-jing2.liu@linux.intel.com/ >>>>>> >>>>> >>>>> I plan to have a look this weekend. >>>>> >>>>> Thanks, >>>>> Marcel >>>> >> >> >
On 09/20/2018 05:27 AM, Liu, Jing2 wrote: > Hi Marcle and Michael, > > Re-ping if this is not in the PR list :) > Hi Jing, It was on latest Michael's pull request: http://patchwork.ozlabs.org/patch/967514/ http://patchwork.ozlabs.org/patch/967518/ Thanks for your patches! Marcel > Thanks, > Jing > > On 9/6/2018 10:16 AM, Liu, Jing2 wrote: >> Hi Marcle, >> >> On 9/6/2018 12:36 AM, Marcel Apfelbaum wrote: >>> >>> >>> On 09/05/2018 05:08 AM, Liu, Jing2 wrote: >>>> Hi Marcel and Michael, >>>> >>>> Got no response so I would like to ask if I need do something more for >>>> this serial? :) >>>> >>> >>> Hi Jing, >>> >>> Maybe Michael is PTO, let's wait a few more days. >>> >> Thank you, I got it :) >> >> BRs, >> Jing >>> Michael, I can send a pull request for this series if you are busy. >>> Thanks, >>> Marcel >>> >>>> Thanks, >>>> Jing >>>> >>>> On 8/30/2018 10:58 AM, Liu, Jing2 wrote: >>>>> Ping Michael :) >>>>> >>>>> Thanks, >>>>> Jing >>>>> >>>>> On 8/25/2018 12:51 AM, Marcel Apfelbaum wrote: >>>>>>>>>> On 08/21/2018 06:18 AM, Jing Liu wrote: >>>>>>>>>>> Add hint to firmware (e.g. SeaBIOS) to reserve addtional >>>>>>>>>>> BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the >>>>>>>>>>> resource reserve capability deleting in pci_bridge_dev_exitfn. >>>>>>>>>>> >>>>>>>>>>> Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> >>>>>>>>>>> --- >>>>>>>>>>> hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ >>>>>>>>>>> 1 file changed, 24 insertions(+) >>>>> [...] >>>>>>>>>> Reviewed-by: Marcel Apfelbaum<marcel.apfelbaum@gmail.com> >>>>>>>>>> >>>>>>>>> Thanks for the quick reviewing and feedback. >>>>>>>>> So could I ask what I should do now, update a new version >>>>>>>>> with your rb or just waiting for pushing, or else? >>>>>>>>> >>>>>>>> >>>>>>>> You just need to wait until Michael adds the series >>>>>>>> to his next pull request. Nothing more to do. >>>>>>>> >>>>>>> OK, got it! Thanks! >>>>>> >>>>>> Please ping Michael if your code is not merged in a week or so. >>>>>> >>>>>>> BTW, do you have some suggestion on the seabios counterpart >>>>>>> patches? >>>>>>> https://patchew.org/Seabios/1534386737-8131-1-git-send-email-jing2.liu@linux.intel.com/ >>>>>>> >>>>>> >>>>>> I plan to have a look this weekend. >>>>>> >>>>>> Thanks, >>>>>> Marcel >>>>> >>> >>> >>
diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index b2d861d..97a8e8b 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -46,6 +46,9 @@ struct PCIBridgeDev { uint32_t flags; OnOffAuto msi; + + /* additional resources to reserve */ + PCIResReserve res_reserve; }; typedef struct PCIBridgeDev PCIBridgeDev; @@ -95,6 +98,12 @@ static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp) error_free(local_err); } + err = pci_bridge_qemu_reserve_cap_init(dev, 0, + bridge_dev->res_reserve, errp); + if (err) { + goto cap_error; + } + if (shpc_present(dev)) { /* TODO: spec recommends using 64 bit prefetcheable BAR. * Check whether that works well. */ @@ -103,6 +112,8 @@ static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp) } return; +cap_error: + msi_uninit(dev); msi_error: slotid_cap_cleanup(dev); slotid_error: @@ -116,6 +127,8 @@ shpc_error: static void pci_bridge_dev_exitfn(PCIDevice *dev) { PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev); + + pci_del_capability(dev, PCI_CAP_ID_VNDR, sizeof(PCIBridgeQemuCap)); if (msi_present(dev)) { msi_uninit(dev); } @@ -162,6 +175,17 @@ static Property pci_bridge_dev_properties[] = { ON_OFF_AUTO_AUTO), DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags, PCI_BRIDGE_DEV_F_SHPC_REQ, true), + DEFINE_PROP_UINT32("bus-reserve", PCIBridgeDev, + res_reserve.bus, -1), + DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev, + res_reserve.io, -1), + DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev, + res_reserve.mem_non_pref, -1), + DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev, + res_reserve.mem_pref_32, -1), + DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev, + res_reserve.mem_pref_64, -1), + DEFINE_PROP_END_OF_LIST(), };
Add hint to firmware (e.g. SeaBIOS) to reserve addtional BUS/IO/MEM/PREF resource for legacy pci-pci bridge. Add the resource reserve capability deleting in pci_bridge_dev_exitfn. Signed-off-by: Jing Liu <jing2.liu@linux.intel.com> --- hw/pci-bridge/pci_bridge_dev.c | 24 ++++++++++++++++++++++++ 1 file changed, 24 insertions(+)