Message ID | 20180820224537.GA9137@ibm-toto.the-meissners.org |
---|---|
State | New |
Headers | show |
Series | , PR target/87033, General LWAX on PowerPC | expand |
On Mon, Aug 20, 2018 at 06:45:37PM -0400, Michael Meissner wrote: > In this patch earlier to improve switch behavior: > https://gcc.gnu.org/ml/gcc-patches/2018-07/msg01957.html > > I noticed that the compiler wasn't generating the LWAX instruction. I tracked > this down to the "extendsi<mode>2" insn using the "Y" constraint when it can > optimize a load + sign extend into a single load with sign extend. The "Y" > constraint is for DS-form offsettable addresses, and does not allow indexed > addresses (i.e. X-form loads). This patch adds the "Z" constraint as well, > which allows indexed addresses. This is okay for trunk, and for backports too. Thanks! > +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ Maybe add a comment on why lp64 is needed here, it took me a minute :-) Segher
Index: gcc/config/rs6000/rs6000.md =================================================================== --- gcc/config/rs6000/rs6000.md (revision 263672) +++ gcc/config/rs6000/rs6000.md (working copy) @@ -988,7 +988,7 @@ (define_insn "extendsi<mode>2" "=r, r, wl, wu, wj, wK, wH, wr") (sign_extend:EXTSI (match_operand:SI 1 "lwa_operand" - "Y, r, Z, Z, r, wK, wH, ?wIwH")))] + "YZ, r, Z, Z, r, wK, wH, ?wIwH")))] "" "@ lwa%U1%X1 %0,%1 Index: gcc/testsuite/gcc.target/powerpc/pr87033.c =================================================================== --- gcc/testsuite/gcc.target/powerpc/pr87033.c (nonexistent) +++ gcc/testsuite/gcc.target/powerpc/pr87033.c (working copy) @@ -0,0 +1,11 @@ +/* { dg-do compile { target { powerpc*-*-* && lp64 } } } */ +/* { dg-options "-O2" } */ + +/* Insure that a LWAX is generated instead of ADD + LWA. */ +long func (int *p, unsigned long n) +{ + return p[n]; +} + +/* { dg-final { scan-assembler {\mlwax\M} } } */ +/* { dg-final { scan-assembler-not {\mlwa\M} } } */