Patchwork [U-Boot,v2,1/3] MX5: Make the weim structure complete

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Submitter Fabio Estevam
Date May 16, 2011, 10:29 p.m.
Message ID <1305584991-13040-1-git-send-email-fabio.estevam@freescale.com>
Download mbox | patch
Permalink /patch/95840/
State Changes Requested
Delegated to: Stefano Babic
Headers show

Comments

Fabio Estevam - May 16, 2011, 10:29 p.m.
Make the weim register set complete for MX51/MX53.

While at it also add the weim chip select 1 address definition.

Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
---
Changes since v1:
- Make the weim struct complete

 arch/arm/include/asm/arch-mx5/imx-regs.h |   46 ++++++++++++++++++++++++++----
 1 files changed, 40 insertions(+), 6 deletions(-)
Jason Liu - May 17, 2011, 5:06 a.m.
Hi, Fabio,

2011/5/17 Fabio Estevam <fabio.estevam@freescale.com>:
> Make the weim register set complete for MX51/MX53.
>
> While at it also add the weim chip select 1 address definition.
>

From the code, you just add the cs for mx53 not for mx51, so,
Had better specify you add the cs1 address definition for mx53,
otherwise, it will make confusion.

> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Changes since v1:
> - Make the weim struct complete
>
>  arch/arm/include/asm/arch-mx5/imx-regs.h |   46 ++++++++++++++++++++++++++----
>  1 files changed, 40 insertions(+), 6 deletions(-)
>
> diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
> index a1849f8..d80e0c0 100644
> --- a/arch/arm/include/asm/arch-mx5/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
> @@ -41,6 +41,7 @@
>  #define CSD1_BASE_ADDR          0xB0000000
>  #define NFC_BASE_ADDR_AXI       0xF7FF0000
>  #define IRAM_BASE_ADDR          0xF8000000
> +#define CS1_BASE_ADDR           0xF4000000
>  #else
>  #error "CPU_TYPE not defined"
>  #endif
> @@ -231,12 +232,45 @@ struct clkctl {
>


Jason Liu

> --
> 1.6.0.4
>
>
> _______________________________________________
> U-Boot mailing list
> U-Boot@lists.denx.de
> http://lists.denx.de/mailman/listinfo/u-boot
>
Stefano Babic - May 17, 2011, 12:42 p.m.
On 05/17/2011 12:29 AM, Fabio Estevam wrote:
> Make the weim register set complete for MX51/MX53.
> 
> While at it also add the weim chip select 1 address definition.
> 
> Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
> ---
> Changes since v1:
> - Make the weim struct complete
> 
>  arch/arm/include/asm/arch-mx5/imx-regs.h |   46 ++++++++++++++++++++++++++----
>  1 files changed, 40 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
> index a1849f8..d80e0c0 100644
> --- a/arch/arm/include/asm/arch-mx5/imx-regs.h
> +++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
> @@ -41,6 +41,7 @@
>  #define CSD1_BASE_ADDR          0xB0000000
>  #define NFC_BASE_ADDR_AXI       0xF7FF0000
>  #define IRAM_BASE_ADDR          0xF8000000
> +#define CS1_BASE_ADDR           0xF4000000
>  #else
>  #error "CPU_TYPE not defined"
>  #endif
> @@ -231,12 +232,45 @@ struct clkctl {
>  
>  /* WEIM registers */
>  struct weim {
> -	u32	csgcr1;
> -	u32	csgcr2;
> -	u32	csrcr1;
> -	u32	csrcr2;
> -	u32	cswcr1;
> -	u32	cswcr2;
> +	u32	cs0gcr1;

The patch breaks the vision2 board. However, you set the names now
exactly how we can find in the reference manual, and this is better and
generates less confusion. Do not worry about the vision2, I will fix it
when your patch will be merged and before my pull.

Best regards,
Stefano Babic
Stefano Babic - May 17, 2011, 12:44 p.m.
On 05/17/2011 07:06 AM, Jason Liu wrote:
> Hi, Fabio,
> 
> 2011/5/17 Fabio Estevam <fabio.estevam@freescale.com>:
>> Make the weim register set complete for MX51/MX53.
>>
>> While at it also add the weim chip select 1 address definition.
>>
> 
> From the code, you just add the cs for mx53 not for mx51, so,
> Had better specify you add the cs1 address definition for mx53,
> otherwise, it will make confusion.

Sure ? The structure is not protected by any CONFIG_MX5x switch, and at
least one mx51 board uses it. The registers have the same layout for
both processor. Why do you think is only for MX53 ?

Regards,
Stefano Babic
Fabio Estevam - May 17, 2011, 12:58 p.m.
Hi Stefano,

On 5/17/2011 9:44 AM, Stefano Babic wrote:
> On 05/17/2011 07:06 AM, Jason Liu wrote:
>> Hi, Fabio,
>>
>> 2011/5/17 Fabio Estevam <fabio.estevam@freescale.com>:
>>> Make the weim register set complete for MX51/MX53.
>>>
>>> While at it also add the weim chip select 1 address definition.
>>>
>>
>> From the code, you just add the cs for mx53 not for mx51, so,
>> Had better specify you add the cs1 address definition for mx53,
>> otherwise, it will make confusion.
> 
> Sure ? The structure is not protected by any CONFIG_MX5x switch, and at
> least one mx51 board uses it. The registers have the same layout for
> both processor. Why do you think is only for MX53 ?

I think what Jason mentions is the fact that I added:
#define CS1_BASE_ADDR   0xF4000000 and this was only for MX53 because it is protected by
"elif defined(CONFIG_MX53)"

I can add the CS1_BASE_ADDR for MX51 as well on my v3 series.

The weim layout registers are the same for MX51 and MX53.

Regards,

Fabi Estevam
Stefano Babic - May 17, 2011, 1:12 p.m.
On 05/17/2011 02:58 PM, Fabio Estevam wrote:
> I think what Jason mentions is the fact that I added:
> #define CS1_BASE_ADDR   0xF4000000 and this was only for MX53 because it is protected by
> "elif defined(CONFIG_MX53)"

Ah ok, agree.

> 
> I can add the CS1_BASE_ADDR for MX51 as well on my v3 series.
> 
> The weim layout registers are the same for MX51 and MX53.

Yes, they are.


Best regards,
Stefano Babic

Patch

diff --git a/arch/arm/include/asm/arch-mx5/imx-regs.h b/arch/arm/include/asm/arch-mx5/imx-regs.h
index a1849f8..d80e0c0 100644
--- a/arch/arm/include/asm/arch-mx5/imx-regs.h
+++ b/arch/arm/include/asm/arch-mx5/imx-regs.h
@@ -41,6 +41,7 @@ 
 #define CSD1_BASE_ADDR          0xB0000000
 #define NFC_BASE_ADDR_AXI       0xF7FF0000
 #define IRAM_BASE_ADDR          0xF8000000
+#define CS1_BASE_ADDR           0xF4000000
 #else
 #error "CPU_TYPE not defined"
 #endif
@@ -231,12 +232,45 @@  struct clkctl {
 
 /* WEIM registers */
 struct weim {
-	u32	csgcr1;
-	u32	csgcr2;
-	u32	csrcr1;
-	u32	csrcr2;
-	u32	cswcr1;
-	u32	cswcr2;
+	u32	cs0gcr1;
+	u32	cs0gcr2;
+	u32	cs0rcr1;
+	u32	cs0rcr2;
+	u32	cs0wcr1;
+	u32	cs0wcr2;
+	u32	cs1gcr1;
+	u32	cs1gcr2;
+	u32	cs1rcr1;
+	u32	cs1rcr2;
+	u32	cs1wcr1;
+	u32	cs1wcr2;
+	u32	cs2gcr1;
+	u32	cs2gcr2;
+	u32	cs2rcr1;
+	u32	cs2rcr2;
+	u32	cs2wcr1;
+	u32	cs2wcr2;
+	u32	cs3gcr1;
+	u32	cs3gcr2;
+	u32	cs3rcr1;
+	u32	cs3rcr2;
+	u32	cs3wcr1;
+	u32	cs3wcr2;
+	u32	cs4gcr1;
+	u32	cs4gcr2;
+	u32	cs4rcr1;
+	u32	cs4rcr2;
+	u32	cs4wcr1;
+	u32	cs4wcr2;
+	u32	cs5gcr1;
+	u32	cs5gcr2;
+	u32	cs5rcr1;
+	u32	cs5rcr2;
+	u32	cs5wcr1;
+	u32	cs5wcr2;
+	u32	wcr;
+	u32	wiar;
+	u32	ear;
 };
 
 /* GPIO Registers */