From patchwork Mon May 16 17:29:35 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Russell King - ARM Linux X-Patchwork-Id: 95788 Return-Path: X-Original-To: incoming-imx@patchwork.ozlabs.org Delivered-To: patchwork-incoming-imx@bilbo.ozlabs.org Received: from bombadil.infradead.org (bombadil.infradead.org [18.85.46.34]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 32266B6EF1 for ; Tue, 17 May 2011 03:29:56 +1000 (EST) Received: from canuck.infradead.org ([2001:4978:20e::1]) by bombadil.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QM1c7-0007LW-QY; Mon, 16 May 2011 17:29:52 +0000 Received: from localhost ([127.0.0.1] helo=canuck.infradead.org) by canuck.infradead.org with esmtp (Exim 4.76 #1 (Red Hat Linux)) id 1QM1c6-00008W-BD; Mon, 16 May 2011 17:29:50 +0000 Received: from caramon.arm.linux.org.uk ([78.32.30.218]) by canuck.infradead.org with esmtps (Exim 4.76 #1 (Red Hat Linux)) id 1QM1c2-00008C-8L for linux-arm-kernel@lists.infradead.org; Mon, 16 May 2011 17:29:47 +0000 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=arm.linux.org.uk; s=caramon; h=Sender:Content-Type:MIME-Version:Subject:Cc:To:From:References:In-Reply-To:Message-Id:Date; bh=BrCnHKY1VaILv7W0HbMa5MHQVpys/uR9OzhwPk+yfyA=; b=NWgKkAB64/1oh1M9VlUBiCHV9V+3IBkrYaPx/QuPe5h/zxr8uIdOP1G0XFWxEcxLnrIsxYr4KBpvFMC0py4AWQBVmqbr83R+2KCS9bPEn005ya+hVx8Tf26k8q4fmVa9BL5Vd8DmbJSrAthy1tBwTh6+RoLpSkJDvcRgAiqSCZ8=; Received: from e0022681537dd.dyn.arm.linux.org.uk ([2002:4e20:1eda:1:222:68ff:fe15:37dd] helo=rmk-PC.arm.linux.org.uk) by caramon.arm.linux.org.uk with esmtpsa (TLSv1:AES256-SHA:256) (Exim 4.72) (envelope-from ) id 1QM1bu-0002lI-M8; Mon, 16 May 2011 18:29:39 +0100 Received: from rmk by rmk-PC.arm.linux.org.uk with local (Exim 4.72) (envelope-from ) id 1QM1br-0003E1-N3; Mon, 16 May 2011 18:29:35 +0100 Date: Mon, 16 May 2011 18:29:35 +0100 Message-Id: In-Reply-To: <20110516172334.GD13659@n2100.arm.linux.org.uk> References: <20110516172334.GD13659@n2100.arm.linux.org.uk> From: Russell King - ARM Linux To: linux-arm-kernel@lists.infradead.org, John Stultz , Thomas Gleixner Subject: [PATCH 12/19] clocksource: convert MXS timrotv2 to 32-bit down counting clocksource MIME-Version: 1.0 Content-Disposition: inline X-CRM114-Version: 20090807-BlameThorstenAndJenny ( TRE 0.7.6 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20110516_132947_453502_D10C7D97 X-CRM114-Status: GOOD ( 13.46 ) X-Spam-Score: -2.4 (--) X-Spam-Report: SpamAssassin version 3.3.1 on canuck.infradead.org summary: Content analysis details: (-2.4 points) pts rule name description ---- ---------------------- -------------------------------------------------- -2.3 RCVD_IN_DNSWL_MED RBL: Sender listed at http://www.dnswl.org/, medium trust [78.32.30.218 listed in list.dnswl.org] -0.0 T_RP_MATCHES_RCVD Envelope sender domain matches handover relay domain -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature Cc: Sascha Hauer X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.12 Precedence: list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: linux-arm-kernel-bounces@lists.infradead.org Errors-To: linux-arm-kernel-bounces+incoming-imx=patchwork.ozlabs.org@lists.infradead.org List-Id: linux-imx-kernel.lists.patchwork.ozlabs.org Convert the MXS timrotv2 32-bit down counting clocksource to the generic clocksource infrastructure. Cc: Sascha Hauer Acked-by: Shawn Guo Signed-off-by: Russell King --- arch/arm/Kconfig | 1 + arch/arm/mach-mxs/timer.c | 20 +++++++------------- 2 files changed, 8 insertions(+), 13 deletions(-) diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index cbc27fb..43f003a 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -376,6 +376,7 @@ config ARCH_MXS select GENERIC_CLOCKEVENTS select ARCH_REQUIRE_GPIOLIB select CLKDEV_LOOKUP + select CLKSRC_MMIO help Support for Freescale MXS-based family of processors diff --git a/arch/arm/mach-mxs/timer.c b/arch/arm/mach-mxs/timer.c index 13647f3..cace0d2 100644 --- a/arch/arm/mach-mxs/timer.c +++ b/arch/arm/mach-mxs/timer.c @@ -101,11 +101,6 @@ static cycle_t timrotv1_get_cycles(struct clocksource *cs) & 0xffff0000) >> 16); } -static cycle_t timrotv2_get_cycles(struct clocksource *cs) -{ - return ~__raw_readl(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1)); -} - static int timrotv1_set_next_event(unsigned long evt, struct clock_event_device *dev) { @@ -230,8 +225,8 @@ static int __init mxs_clockevent_init(struct clk *timer_clk) static struct clocksource clocksource_mxs = { .name = "mxs_timer", .rating = 200, - .read = timrotv2_get_cycles, - .mask = CLOCKSOURCE_MASK(32), + .read = timrotv1_get_cycles, + .mask = CLOCKSOURCE_MASK(16), .flags = CLOCK_SOURCE_IS_CONTINUOUS, }; @@ -239,12 +234,11 @@ static int __init mxs_clocksource_init(struct clk *timer_clk) { unsigned int c = clk_get_rate(timer_clk); - if (timrot_is_v1()) { - clocksource_mxs.read = timrotv1_get_cycles; - clocksource_mxs.mask = CLOCKSOURCE_MASK(16); - } - - clocksource_register_hz(&clocksource_mxs, c); + if (timrot_is_v1()) + clocksource_register_hz(&clocksource_mxs, c); + else + clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1), + "mxs_timer", c, 200, 32, clocksource_mmio_readl_down); return 0; }